Lines Matching defs:UARTSR
27 #define UARTSR 0x0014 /* UART mode status register */
167 while (((status = readl(sport->membase + UARTSR)) &
172 writel(status | LINFLEXD_UARTSR_DTFTFF, sport->membase + UARTSR);
235 status = readl(sport->membase + UARTSR);
257 writel(status, sport->membase + UARTSR);
258 status = readl(sport->membase + UARTSR);
281 status = readl(sport->membase + UARTSR);
296 status = readl(port->membase + UARTSR) & LINFLEXD_UARTSR_DTFTFF;
564 while ((readl(port->membase + UARTSR) &
569 while (readl(port->membase + UARTSR) &
574 writel((readl(port->membase + UARTSR) |
576 port->membase + UARTSR);