Lines Matching refs:pinfo
51 static void cpm_uart_initbd(struct uart_cpm_port *pinfo);
67 struct uart_cpm_port *pinfo =
69 cbd_t __iomem *bdp = pinfo->tx_bd_base;
90 struct uart_cpm_port *pinfo =
93 if (pinfo->gpios[GPIO_RTS])
94 gpiod_set_value(pinfo->gpios[GPIO_RTS], !(mctrl & TIOCM_RTS));
96 if (pinfo->gpios[GPIO_DTR])
97 gpiod_set_value(pinfo->gpios[GPIO_DTR], !(mctrl & TIOCM_DTR));
102 struct uart_cpm_port *pinfo =
106 if (pinfo->gpios[GPIO_CTS]) {
107 if (gpiod_get_value(pinfo->gpios[GPIO_CTS]))
111 if (pinfo->gpios[GPIO_DSR]) {
112 if (gpiod_get_value(pinfo->gpios[GPIO_DSR]))
116 if (pinfo->gpios[GPIO_DCD]) {
117 if (gpiod_get_value(pinfo->gpios[GPIO_DCD]))
121 if (pinfo->gpios[GPIO_RI]) {
122 if (!gpiod_get_value(pinfo->gpios[GPIO_RI]))
134 struct uart_cpm_port *pinfo =
136 smc_t __iomem *smcp = pinfo->smcp;
137 scc_t __iomem *sccp = pinfo->sccp;
141 if (IS_SMC(pinfo))
152 struct uart_cpm_port *pinfo =
154 smc_t __iomem *smcp = pinfo->smcp;
155 scc_t __iomem *sccp = pinfo->sccp;
159 if (IS_SMC(pinfo)) {
168 if (IS_SMC(pinfo)) {
181 struct uart_cpm_port *pinfo =
183 smc_t __iomem *smcp = pinfo->smcp;
184 scc_t __iomem *sccp = pinfo->sccp;
188 if (IS_SMC(pinfo))
199 struct uart_cpm_port *pinfo =
206 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
208 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
234 struct uart_cpm_port *pinfo =
245 bdp = pinfo->rx_cur;
271 cp = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
301 bdp = pinfo->rx_bd_base;
308 pinfo->rx_cur = bdp;
359 struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
360 smc_t __iomem *smcp = pinfo->smcp;
361 scc_t __iomem *sccp = pinfo->sccp;
365 if (IS_SMC(pinfo)) {
390 struct uart_cpm_port *pinfo =
396 if (!(pinfo->flags & FLAG_CONSOLE)) {
398 if (IS_SMC(pinfo)) {
399 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN);
400 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
402 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR);
403 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
405 cpm_uart_initbd(pinfo);
406 if (IS_SMC(pinfo)) {
407 out_be32(&pinfo->smcup->smc_rstate, 0);
408 out_be32(&pinfo->smcup->smc_tstate, 0);
409 out_be16(&pinfo->smcup->smc_rbptr,
410 in_be16(&pinfo->smcup->smc_rbase));
411 out_be16(&pinfo->smcup->smc_tbptr,
412 in_be16(&pinfo->smcup->smc_tbase));
414 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
423 if (IS_SMC(pinfo)) {
424 setbits8(&pinfo->smcp->smc_smcm, SMCM_RX);
425 setbits16(&pinfo->smcp->smc_smcmr, (SMCMR_REN | SMCMR_TEN));
427 setbits16(&pinfo->sccp->scc_sccm, UART_SCCM_RX);
428 setbits32(&pinfo->sccp->scc_gsmrl, (SCC_GSMRL_ENR | SCC_GSMRL_ENT));
434 inline void cpm_uart_wait_until_send(struct uart_cpm_port *pinfo)
437 schedule_timeout(pinfo->wait_closing);
445 struct uart_cpm_port *pinfo =
454 if (!(pinfo->flags & FLAG_CONSOLE)) {
461 if (pinfo->wait_closing)
462 cpm_uart_wait_until_send(pinfo);
465 if (IS_SMC(pinfo)) {
466 smc_t __iomem *smcp = pinfo->smcp;
470 scc_t __iomem *sccp = pinfo->sccp;
476 if (IS_SMC(pinfo)) {
477 out_be16(&pinfo->smcup->smc_brkcr, 0);
478 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
480 out_be16(&pinfo->sccup->scc_brkcr, 0);
481 cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
484 cpm_uart_initbd(pinfo);
495 struct uart_cpm_port *pinfo =
497 smc_t __iomem *smcp = pinfo->smcp;
498 scc_t __iomem *sccp = pinfo->sccp;
505 pinfo->rx_fifosize = 1;
507 pinfo->rx_fifosize = RX_BUF_SIZE;
574 if (IS_SMC(pinfo)) {
586 out_be16(&pinfo->smcup->smc_mrblr, pinfo->rx_fifosize);
587 out_be16(&pinfo->smcup->smc_maxidl, maxidl);
603 out_be16(&pinfo->sccup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
604 out_be16(&pinfo->sccup->scc_maxidl, maxidl);
608 if (pinfo->clk)
609 clk_set_rate(pinfo->clk, baud);
611 cpm_setbrg(pinfo->brg - 1, baud);
649 struct uart_cpm_port *pinfo =
656 bdp = pinfo->tx_cur;
658 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
666 bdp = pinfo->tx_bd_base;
669 pinfo->tx_cur = bdp;
682 bdp = pinfo->tx_cur;
686 p = cpm2cpu_addr(in_be32(&bdp->cbd_bufaddr), pinfo);
687 while (count < pinfo->tx_fifosize) {
698 bdp = pinfo->tx_bd_base;
702 pinfo->tx_cur = bdp;
718 static void cpm_uart_initbd(struct uart_cpm_port *pinfo)
724 pr_debug("CPM uart[%d]:initbd\n", pinfo->port.line);
730 mem_addr = pinfo->mem_addr;
731 bdp = pinfo->rx_cur = pinfo->rx_bd_base;
732 for (i = 0; i < (pinfo->rx_nrfifos - 1); i++, bdp++) {
733 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
735 mem_addr += pinfo->rx_fifosize;
738 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
745 mem_addr = pinfo->mem_addr + L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize);
746 bdp = pinfo->tx_cur = pinfo->tx_bd_base;
747 for (i = 0; i < (pinfo->tx_nrfifos - 1); i++, bdp++) {
748 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
750 mem_addr += pinfo->tx_fifosize;
753 out_be32(&bdp->cbd_bufaddr, cpu2cpm_addr(mem_addr, pinfo));
757 static void cpm_uart_init_scc(struct uart_cpm_port *pinfo)
762 pr_debug("CPM uart[%d]:init_scc\n", pinfo->port.line);
764 scp = pinfo->sccp;
765 sup = pinfo->sccup;
768 out_be16(&pinfo->sccup->scc_genscc.scc_rbase,
769 (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
770 out_be16(&pinfo->sccup->scc_genscc.scc_tbase,
771 (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
780 out_be16(&sup->scc_genscc.scc_mrblr, pinfo->rx_fifosize);
802 cpm_line_cr_cmd(pinfo, CPM_CR_INIT_TRX);
820 static void cpm_uart_init_smc(struct uart_cpm_port *pinfo)
825 pr_debug("CPM uart[%d]:init_smc\n", pinfo->port.line);
827 sp = pinfo->smcp;
828 up = pinfo->smcup;
831 out_be16(&pinfo->smcup->smc_rbase,
832 (u8 __iomem *)pinfo->rx_bd_base - DPRAM_BASE);
833 out_be16(&pinfo->smcup->smc_tbase,
834 (u8 __iomem *)pinfo->tx_bd_base - DPRAM_BASE);
839 out_be16(&up->smc_rbptr, in_be16(&pinfo->smcup->smc_rbase));
840 out_be16(&up->smc_tbptr, in_be16(&pinfo->smcup->smc_tbase));
853 out_be16(&up->smc_mrblr, pinfo->rx_fifosize);
877 static int cpm_uart_allocbuf(struct uart_cpm_port *pinfo, unsigned int is_con)
885 pr_debug("CPM uart[%d]:allocbuf\n", pinfo->port.line);
887 dpmemsz = sizeof(cbd_t) * (pinfo->rx_nrfifos + pinfo->tx_nrfifos);
896 memsz = L1_CACHE_ALIGN(pinfo->rx_nrfifos * pinfo->rx_fifosize) +
897 L1_CACHE_ALIGN(pinfo->tx_nrfifos * pinfo->tx_fifosize);
907 mem_addr = dma_alloc_coherent(pinfo->port.dev, memsz, &dma_addr,
917 pinfo->dp_addr = dp_offset;
918 pinfo->mem_addr = mem_addr;
919 pinfo->dma_addr = dma_addr;
920 pinfo->mem_size = memsz;
922 pinfo->rx_buf = mem_addr;
923 pinfo->tx_buf = pinfo->rx_buf + L1_CACHE_ALIGN(pinfo->rx_nrfifos
924 * pinfo->rx_fifosize);
926 pinfo->rx_bd_base = (cbd_t __iomem *)dp_mem;
927 pinfo->tx_bd_base = pinfo->rx_bd_base + pinfo->rx_nrfifos;
932 static void cpm_uart_freebuf(struct uart_cpm_port *pinfo)
934 dma_free_coherent(pinfo->port.dev, L1_CACHE_ALIGN(pinfo->rx_nrfifos *
935 pinfo->rx_fifosize) +
936 L1_CACHE_ALIGN(pinfo->tx_nrfifos *
937 pinfo->tx_fifosize), (void __force *)pinfo->mem_addr,
938 pinfo->dma_addr);
940 cpm_muram_free(pinfo->dp_addr);
949 struct uart_cpm_port *pinfo =
955 if (pinfo->flags & FLAG_CONSOLE)
958 if (IS_SMC(pinfo)) {
959 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
960 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
962 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
963 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
966 ret = cpm_uart_allocbuf(pinfo, 0);
971 cpm_uart_initbd(pinfo);
972 if (IS_SMC(pinfo))
973 cpm_uart_init_smc(pinfo);
975 cpm_uart_init_scc(pinfo);
982 struct uart_cpm_port *pinfo =
985 if (!(pinfo->flags & FLAG_CONSOLE))
986 cpm_uart_freebuf(pinfo);
1007 static void cpm_uart_early_write(struct uart_cpm_port *pinfo,
1016 bdp = pinfo->tx_cur;
1017 bdbase = pinfo->tx_bd_base;
1038 pinfo);
1055 pinfo);
1075 pinfo->tx_cur = bdp;
1090 static int poll_wait_key(char *obuf, struct uart_cpm_port *pinfo)
1098 bdp = pinfo->rx_cur;
1105 cp = cpm2cpu_addr(bdp->cbd_bufaddr, pinfo);
1117 bdp = pinfo->rx_bd_base;
1120 pinfo->rx_cur = (cbd_t *)bdp;
1127 struct uart_cpm_port *pinfo =
1135 int ret = poll_wait_key(poll_buf, pinfo);
1149 struct uart_cpm_port *pinfo =
1154 cpm_uart_early_write(pinfo, ch, 1, false);
1259 struct uart_cpm_port *pinfo)
1263 struct device *dev = pinfo->port.dev;
1272 pinfo->clk = clk;
1274 if (!pinfo->clk) {
1281 pinfo->brg = *data;
1290 pinfo->command = *data;
1298 pinfo->sccp = mem;
1299 pinfo->sccup = pram = cpm_uart_map_pram(pinfo, np);
1302 pinfo->flags |= FLAG_SMC;
1303 pinfo->smcp = mem;
1304 pinfo->smcup = pram = cpm_uart_map_pram(pinfo, np);
1315 pinfo->tx_nrfifos = TX_NUM_FIFO;
1316 pinfo->tx_fifosize = TX_BUF_SIZE;
1317 pinfo->rx_nrfifos = RX_NUM_FIFO;
1318 pinfo->rx_fifosize = RX_BUF_SIZE;
1320 pinfo->port.uartclk = ppc_proc_freq;
1321 pinfo->port.mapbase = (unsigned long)mem;
1322 pinfo->port.type = PORT_CPM;
1323 pinfo->port.ops = &cpm_uart_pops;
1324 pinfo->port.has_sysrq = IS_ENABLED(CONFIG_SERIAL_CPM_CONSOLE);
1325 pinfo->port.iotype = UPIO_MEM;
1326 pinfo->port.fifosize = pinfo->tx_nrfifos * pinfo->tx_fifosize;
1327 spin_lock_init(&pinfo->port.lock);
1332 pinfo->gpios[i] = NULL;
1351 pinfo->gpios[i] = gpiod;
1362 return cpm_uart_request_port(&pinfo->port);
1365 cpm_uart_unmap_pram(pinfo, pram);
1381 struct uart_cpm_port *pinfo = &cpm_uart_ports[co->index];
1386 cpm_uart_early_write(pinfo, s, count, true);
1389 spin_lock_irqsave(&pinfo->port.lock, flags);
1390 cpm_uart_early_write(pinfo, s, count, true);
1391 spin_unlock_irqrestore(&pinfo->port.lock, flags);
1403 struct uart_cpm_port *pinfo;
1429 pinfo = &cpm_uart_ports[co->index];
1431 pinfo->flags |= FLAG_CONSOLE;
1432 port = &pinfo->port;
1434 ret = cpm_uart_init_port(np, pinfo);
1447 if (IS_SMC(pinfo)) {
1448 out_be16(&pinfo->smcup->smc_brkcr, 0);
1449 cpm_line_cr_cmd(pinfo, CPM_CR_STOP_TX);
1450 clrbits8(&pinfo->smcp->smc_smcm, SMCM_RX | SMCM_TX);
1451 clrbits16(&pinfo->smcp->smc_smcmr, SMCMR_REN | SMCMR_TEN);
1453 out_be16(&pinfo->sccup->scc_brkcr, 0);
1454 cpm_line_cr_cmd(pinfo, CPM_CR_GRA_STOP_TX);
1455 clrbits16(&pinfo->sccp->scc_sccm, UART_SCCM_TX | UART_SCCM_RX);
1456 clrbits32(&pinfo->sccp->scc_gsmrl, SCC_GSMRL_ENR | SCC_GSMRL_ENT);
1459 ret = cpm_uart_allocbuf(pinfo, 1);
1464 cpm_uart_initbd(pinfo);
1466 if (IS_SMC(pinfo))
1467 cpm_uart_init_smc(pinfo);
1469 cpm_uart_init_scc(pinfo);
1472 cpm_line_cr_cmd(pinfo, CPM_CR_RESTART_TX);
1476 udbg_port = &pinfo->port;
1526 struct uart_cpm_port *pinfo = &cpm_uart_ports[index];
1529 pinfo->port.line = index;
1534 platform_set_drvdata(ofdev, pinfo);
1537 pinfo->port.dev = &ofdev->dev;
1539 pinfo->port.irq = irq_of_parse_and_map(ofdev->dev.of_node, 0);
1540 if (!pinfo->port.irq)
1543 ret = cpm_uart_init_port(ofdev->dev.of_node, pinfo);
1545 return uart_add_one_port(&cpm_reg, &pinfo->port);
1547 irq_dispose_mapping(pinfo->port.irq);
1554 struct uart_cpm_port *pinfo = platform_get_drvdata(ofdev);
1556 uart_remove_one_port(&cpm_reg, &pinfo->port);