Lines Matching refs:port
73 static inline unsigned int bcm_uart_readl(struct uart_port *port,
76 return __raw_readl(port->membase + offset);
79 static inline void bcm_uart_writel(struct uart_port *port,
82 __raw_writel(value, port->membase + offset);
88 static unsigned int bcm_uart_tx_empty(struct uart_port *port)
92 val = bcm_uart_readl(port, UART_IR_REG);
99 static void bcm_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
103 val = bcm_uart_readl(port, UART_MCTL_REG);
110 bcm_uart_writel(port, val, UART_MCTL_REG);
112 val = bcm_uart_readl(port, UART_CTL_REG);
117 bcm_uart_writel(port, val, UART_CTL_REG);
123 static unsigned int bcm_uart_get_mctrl(struct uart_port *port)
128 val = bcm_uart_readl(port, UART_EXTINP_REG);
143 static void bcm_uart_stop_tx(struct uart_port *port)
147 val = bcm_uart_readl(port, UART_CTL_REG);
149 bcm_uart_writel(port, val, UART_CTL_REG);
151 val = bcm_uart_readl(port, UART_IR_REG);
153 bcm_uart_writel(port, val, UART_IR_REG);
159 static void bcm_uart_start_tx(struct uart_port *port)
163 val = bcm_uart_readl(port, UART_IR_REG);
165 bcm_uart_writel(port, val, UART_IR_REG);
167 val = bcm_uart_readl(port, UART_CTL_REG);
169 bcm_uart_writel(port, val, UART_CTL_REG);
173 * serial core request to stop rx, called before port shutdown
175 static void bcm_uart_stop_rx(struct uart_port *port)
179 val = bcm_uart_readl(port, UART_IR_REG);
181 bcm_uart_writel(port, val, UART_IR_REG);
187 static void bcm_uart_enable_ms(struct uart_port *port)
191 val = bcm_uart_readl(port, UART_IR_REG);
193 bcm_uart_writel(port, val, UART_IR_REG);
199 static void bcm_uart_break_ctl(struct uart_port *port, int ctl)
204 spin_lock_irqsave(&port->lock, flags);
206 val = bcm_uart_readl(port, UART_CTL_REG);
211 bcm_uart_writel(port, val, UART_CTL_REG);
213 spin_unlock_irqrestore(&port->lock, flags);
217 * return port type in string format
219 static const char *bcm_uart_type(struct uart_port *port)
221 return (port->type == PORT_BCM63XX) ? "bcm63xx_uart" : NULL;
227 static void bcm_uart_do_rx(struct uart_port *port)
229 struct tty_port *tty_port = &port->state->port;
234 * serial port */
242 iestat = bcm_uart_readl(port, UART_IR_REG);
249 val = bcm_uart_readl(port, UART_CTL_REG);
251 bcm_uart_writel(port, val, UART_CTL_REG);
253 port->icount.overrun++;
260 cstat = c = bcm_uart_readl(port, UART_FIFO_REG);
261 port->icount.rx++;
268 port->icount.brk++;
269 if (uart_handle_break(port))
274 port->icount.parity++;
276 port->icount.frame++;
279 cstat &= port->read_status_mask;
288 if (uart_handle_sysrq_char(port, c))
292 if ((cstat & port->ignore_status_mask) == 0)
304 static void bcm_uart_do_tx(struct uart_port *port)
310 val = bcm_uart_readl(port, UART_MCTL_REG);
313 pending = uart_port_tx_limited(port, ch, port->fifosize - val,
315 bcm_uart_writel(port, ch, UART_FIFO_REG),
321 val = bcm_uart_readl(port, UART_IR_REG);
323 bcm_uart_writel(port, val, UART_IR_REG);
331 struct uart_port *port;
334 port = dev_id;
335 spin_lock(&port->lock);
337 irqstat = bcm_uart_readl(port, UART_IR_REG);
339 bcm_uart_do_rx(port);
342 bcm_uart_do_tx(port);
347 estat = bcm_uart_readl(port, UART_EXTINP_REG);
349 uart_handle_cts_change(port,
352 uart_handle_dcd_change(port,
356 spin_unlock(&port->lock);
363 static void bcm_uart_enable(struct uart_port *port)
367 val = bcm_uart_readl(port, UART_CTL_REG);
369 bcm_uart_writel(port, val, UART_CTL_REG);
375 static void bcm_uart_disable(struct uart_port *port)
379 val = bcm_uart_readl(port, UART_CTL_REG);
382 bcm_uart_writel(port, val, UART_CTL_REG);
388 static void bcm_uart_flush(struct uart_port *port)
393 val = bcm_uart_readl(port, UART_CTL_REG);
395 bcm_uart_writel(port, val, UART_CTL_REG);
399 (void)bcm_uart_readl(port, UART_FIFO_REG);
405 static int bcm_uart_startup(struct uart_port *port)
410 /* mask all irq and flush port */
411 bcm_uart_disable(port);
412 bcm_uart_writel(port, 0, UART_IR_REG);
413 bcm_uart_flush(port);
416 (void)bcm_uart_readl(port, UART_EXTINP_REG);
419 val = bcm_uart_readl(port, UART_MCTL_REG);
421 val |= (port->fifosize / 2) << UART_MCTL_RXFIFOTHRESH_SHIFT;
422 val |= (port->fifosize / 2) << UART_MCTL_TXFIFOTHRESH_SHIFT;
423 bcm_uart_writel(port, val, UART_MCTL_REG);
426 val = bcm_uart_readl(port, UART_CTL_REG);
429 bcm_uart_writel(port, val, UART_CTL_REG);
435 bcm_uart_writel(port, val, UART_EXTINP_REG);
438 ret = request_irq(port->irq, bcm_uart_interrupt, 0,
439 dev_name(port->dev), port);
442 bcm_uart_writel(port, UART_RX_INT_MASK, UART_IR_REG);
443 bcm_uart_enable(port);
450 static void bcm_uart_shutdown(struct uart_port *port)
454 spin_lock_irqsave(&port->lock, flags);
455 bcm_uart_writel(port, 0, UART_IR_REG);
456 spin_unlock_irqrestore(&port->lock, flags);
458 bcm_uart_disable(port);
459 bcm_uart_flush(port);
460 free_irq(port->irq, port);
466 static void bcm_uart_set_termios(struct uart_port *port, struct ktermios *new,
473 spin_lock_irqsave(&port->lock, flags);
476 for (tries = 3; !bcm_uart_tx_empty(port) && tries; tries--)
480 bcm_uart_disable(port);
481 bcm_uart_flush(port);
484 ctl = bcm_uart_readl(port, UART_CTL_REG);
514 bcm_uart_writel(port, ctl, UART_CTL_REG);
517 baud = uart_get_baud_rate(port, new, old, 0, port->uartclk / 16);
518 quot = uart_get_divisor(port, baud) - 1;
519 bcm_uart_writel(port, quot, UART_BAUD_REG);
522 ier = bcm_uart_readl(port, UART_IR_REG);
525 if (UART_ENABLE_MS(port, new->c_cflag))
528 bcm_uart_writel(port, ier, UART_IR_REG);
531 port->read_status_mask = UART_FIFO_VALID_MASK;
533 port->read_status_mask |= UART_FIFO_FRAMEERR_MASK;
534 port->read_status_mask |= UART_FIFO_PARERR_MASK;
537 port->read_status_mask |= UART_FIFO_BRKDET_MASK;
539 port->ignore_status_mask = 0;
541 port->ignore_status_mask |= UART_FIFO_PARERR_MASK;
543 port->ignore_status_mask |= UART_FIFO_BRKDET_MASK;
545 port->ignore_status_mask |= UART_FIFO_VALID_MASK;
547 uart_update_timeout(port, new->c_cflag, baud);
548 bcm_uart_enable(port);
549 spin_unlock_irqrestore(&port->lock, flags);
555 static int bcm_uart_request_port(struct uart_port *port)
564 static void bcm_uart_release_port(struct uart_port *port)
570 * serial core request to do any port required autoconfiguration
572 static void bcm_uart_config_port(struct uart_port *port, int flags)
575 if (bcm_uart_request_port(port))
577 port->type = PORT_BCM63XX;
582 * serial core request to check that port information in serinfo are
585 static int bcm_uart_verify_port(struct uart_port *port,
588 if (port->type != PORT_BCM63XX)
590 if (port->irq != serinfo->irq)
592 if (port->iotype != serinfo->io_type)
594 if (port->mapbase != (unsigned long)serinfo->iomem_base)
603 static bool bcm_uart_tx_full(struct uart_port *port)
607 val = bcm_uart_readl(port, UART_MCTL_REG);
609 return !(port->fifosize - val);
612 static int bcm_uart_poll_get_char(struct uart_port *port)
616 iestat = bcm_uart_readl(port, UART_IR_REG);
620 return bcm_uart_readl(port, UART_FIFO_REG);
623 static void bcm_uart_poll_put_char(struct uart_port *port, unsigned char c)
625 while (bcm_uart_tx_full(port)) {
629 bcm_uart_writel(port, c, UART_FIFO_REG);
660 static void wait_for_xmitr(struct uart_port *port)
669 val = bcm_uart_readl(port, UART_IR_REG);
676 if (port->flags & UPF_CONS_FLOW) {
681 val = bcm_uart_readl(port, UART_EXTINP_REG);
692 static void bcm_console_putchar(struct uart_port *port, unsigned char ch)
694 wait_for_xmitr(port);
695 bcm_uart_writel(port, ch, UART_FIFO_REG);
704 struct uart_port *port;
708 port = &ports[co->index];
711 if (port->sysrq) {
715 locked = spin_trylock(&port->lock);
717 spin_lock(&port->lock);
722 uart_console_write(port, s, count, bcm_console_putchar);
725 wait_for_xmitr(port);
728 spin_unlock(&port->lock);
734 * port and setup it.
738 struct uart_port *port;
746 port = &ports[co->index];
747 if (!port->membase)
752 return uart_set_options(port, co, baud, parity, bits, flow);
779 uart_console_write(&dev->port, s, n, bcm_console_putchar);
780 wait_for_xmitr(&dev->port);
786 if (!device->port.membase)
816 struct uart_port *port;
830 port = &ports[pdev->id];
831 if (port->membase)
833 memset(port, 0, sizeof(*port));
835 port->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &res_mem);
836 if (IS_ERR(port->membase))
837 return PTR_ERR(port->membase);
838 port->mapbase = res_mem->start;
843 port->irq = ret;
852 port->iotype = UPIO_MEM;
853 port->ops = &bcm_uart_ops;
854 port->flags = UPF_BOOT_AUTOCONF;
855 port->dev = &pdev->dev;
856 port->fifosize = 16;
857 port->uartclk = clk_get_rate(clk) / 2;
858 port->line = pdev->id;
859 port->has_sysrq = IS_ENABLED(CONFIG_SERIAL_BCM63XX_CONSOLE);
862 ret = uart_add_one_port(&bcm_uart_driver, port);
867 platform_set_drvdata(pdev, port);
873 struct uart_port *port;
875 port = platform_get_drvdata(pdev);
876 uart_remove_one_port(&bcm_uart_driver, port);
877 /* mark port as free */