Lines Matching refs:uart
46 struct tegra_uart *uart;
51 uart = devm_kzalloc(&pdev->dev, sizeof(*uart), GFP_KERNEL);
52 if (!uart)
91 uart->rst = devm_reset_control_get_optional_shared(&pdev->dev, NULL);
92 if (IS_ERR(uart->rst))
93 return PTR_ERR(uart->rst);
97 uart->clk = devm_clk_get(&pdev->dev, NULL);
98 if (IS_ERR(uart->clk)) {
103 ret = clk_prepare_enable(uart->clk);
107 port->uartclk = clk_get_rate(uart->clk);
110 ret = reset_control_deassert(uart->rst);
118 platform_set_drvdata(pdev, uart);
119 uart->line = ret;
124 reset_control_assert(uart->rst);
126 clk_disable_unprepare(uart->clk);
133 struct tegra_uart *uart = platform_get_drvdata(pdev);
135 serial8250_unregister_port(uart->line);
136 reset_control_assert(uart->rst);
137 clk_disable_unprepare(uart->clk);
145 struct tegra_uart *uart = dev_get_drvdata(dev);
146 struct uart_8250_port *port8250 = serial8250_get_port(uart->line);
149 serial8250_suspend_port(uart->line);
152 clk_disable_unprepare(uart->clk);
159 struct tegra_uart *uart = dev_get_drvdata(dev);
160 struct uart_8250_port *port8250 = serial8250_get_port(uart->line);
164 clk_prepare_enable(uart->clk);
166 serial8250_resume_port(uart->line);
176 { .compatible = "nvidia,tegra20-uart", },
189 .name = "tegra-uart",