Lines Matching refs:port
92 setup_port(struct serial_private *priv, struct uart_8250_port *port,
95 return serial8250_pci_setup_port(priv->dev, port, bar, offset, regshift);
103 struct uart_8250_port *port, int idx)
121 return setup_port(priv, port, bar, offset, board->reg_shift);
130 struct uart_8250_port *port, int idx)
142 return setup_port(priv, port, bar, offset, board->reg_shift);
179 * HP's Diva chip puts the 4th/5th serial port further out, and
185 struct uart_8250_port *port, int idx)
207 return setup_port(priv, port, bar, offset, board->reg_shift);
354 struct uart_8250_port *port, int idx)
369 return setup_port(priv, port, bar, offset, board->reg_shift);
509 struct uart_8250_port *port, int idx)
518 return setup_port(priv, port, bar, offset, 0);
563 * PCI_ANY_ID. Some of these devices, however, also feature a parallel port,
602 struct uart_8250_port *port, int idx)
627 return setup_port(priv, port, bar, offset, board->reg_shift);
636 struct uart_8250_port *port, int idx)
652 return setup_port(priv, port, bar, offset, board->reg_shift);
737 struct uart_8250_port *port, int idx)
759 return setup_port(priv, port, bar, offset, board->reg_shift);
764 struct uart_8250_port *port, int idx)
775 return setup_port(priv, port, bar, 0, board->reg_shift);
778 return pci_default_setup(priv, board, port, idx);
811 pci_err(dev, "NetMos/Mostech serial driver ignoring port on ambiguous config.\n");
853 * These chips are available with optionally one parallel port and up to
938 /* read the I/O port from the device */
1068 static unsigned int pci_oxsemi_tornado_get_divisor(struct uart_port *port,
1110 unsigned int sclk = port->uartclk * 2;
1120 if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST) {
1121 unsigned int cust_div = port->custom_divisor;
1188 static void pci_oxsemi_tornado_set_divisor(struct uart_port *port,
1193 struct uart_8250_port *up = up_to_u8250p(port);
1201 serial8250_do_set_divisor(port, baud, quot, 0);
1208 static void pci_oxsemi_tornado_set_mctrl(struct uart_port *port,
1211 struct uart_8250_port *up = up_to_u8250p(port);
1214 serial8250_do_set_mctrl(port, mctrl);
1228 up->port.flags |= UPF_FULL_PROBE;
1229 up->port.get_divisor = pci_oxsemi_tornado_get_divisor;
1230 up->port.set_divisor = pci_oxsemi_tornado_set_divisor;
1231 up->port.set_mctrl = pci_oxsemi_tornado_set_mctrl;
1276 static int pci_quatech_rqopr(struct uart_8250_port *port)
1278 unsigned long base = port->port.iobase;
1288 static void pci_quatech_wqopr(struct uart_8250_port *port, u8 qopr)
1290 unsigned long base = port->port.iobase;
1300 static int pci_quatech_rqmcr(struct uart_8250_port *port)
1302 unsigned long base = port->port.iobase;
1316 static void pci_quatech_wqmcr(struct uart_8250_port *port, u8 qmcr)
1318 unsigned long base = port->port.iobase;
1330 static int pci_quatech_has_qmcr(struct uart_8250_port *port)
1332 unsigned long base = port->port.iobase;
1348 static int pci_quatech_test(struct uart_8250_port *port)
1352 qopr = pci_quatech_rqopr(port);
1353 pci_quatech_wqopr(port, qopr & QPCR_TEST_FOR1);
1354 reg = pci_quatech_rqopr(port) & 0xC0;
1357 pci_quatech_wqopr(port, (qopr & QPCR_TEST_FOR1)|QPCR_TEST_FOR2);
1358 reg = pci_quatech_rqopr(port) & 0xC0;
1361 pci_quatech_wqopr(port, (qopr & QPCR_TEST_FOR1)|QPCR_TEST_FOR3);
1362 reg = pci_quatech_rqopr(port) & 0xC0;
1365 pci_quatech_wqopr(port, (qopr & QPCR_TEST_FOR1)|QPCR_TEST_FOR4);
1366 reg = pci_quatech_rqopr(port) & 0xC0;
1370 pci_quatech_wqopr(port, qopr);
1374 static int pci_quatech_clock(struct uart_8250_port *port)
1379 if (pci_quatech_test(port) < 0)
1382 qopr = pci_quatech_rqopr(port);
1384 pci_quatech_wqopr(port, qopr & ~QOPR_CLOCK_X8);
1385 reg = pci_quatech_rqopr(port);
1390 pci_quatech_wqopr(port, qopr | QOPR_CLOCK_X8);
1391 reg = pci_quatech_rqopr(port);
1414 pci_quatech_wqopr(port, qopr);
1418 static int pci_quatech_rs422(struct uart_8250_port *port)
1423 if (!pci_quatech_has_qmcr(port))
1425 qmcr = pci_quatech_rqmcr(port);
1426 pci_quatech_wqmcr(port, 0xFF);
1427 if (pci_quatech_rqmcr(port))
1429 pci_quatech_wqmcr(port, qmcr);
1442 pci_err(dev, "unknown port type '0x%04X'.\n", dev->device);
1460 struct uart_8250_port *port, int idx)
1463 port->port.iobase = pci_resource_start(priv->dev, FL_GET_BASE(board->flags));
1465 port->port.uartclk = pci_quatech_clock(port);
1467 if (pci_quatech_rs422(port))
1469 return pci_default_setup(priv, board, port, idx);
1474 struct uart_8250_port *port, int idx)
1490 return setup_port(priv, port, bar, offset, board->reg_shift);
1496 struct uart_8250_port *port, int idx)
1500 ret = setup_port(priv, port, idx, 0, board->reg_shift);
1501 port->port.iotype = UPIO_MEM32;
1502 port->port.type = PORT_XSCALE;
1503 port->port.flags = (port->port.flags | UPF_FIXED_PORT | UPF_FIXED_TYPE);
1504 port->port.regshift = 2;
1512 struct uart_8250_port *port, int idx)
1514 return setup_port(priv, port, 2, idx * 8, 0);
1520 struct uart_8250_port *port, int idx)
1522 int ret = pci_default_setup(priv, board, port, idx);
1524 port->port.type = PORT_BRCM_TRUMANAGE;
1525 port->port.flags = (port->port.flags | UPF_FIXED_PORT | UPF_FIXED_TYPE);
1535 static int pci_fintek_rs485_config(struct uart_port *port, struct ktermios *termios,
1538 struct pci_dev *pci_dev = to_pci_dev(port->dev);
1540 u8 *index = (u8 *) port->private_data;
1572 struct uart_8250_port *port, int idx)
1586 port->port.iotype = UPIO_PORT;
1587 port->port.iobase = iobase;
1588 port->port.rs485_config = pci_fintek_rs485_config;
1589 port->port.rs485_supported = pci_fintek_rs485_supported;
1597 port->port.private_data = data;
1639 /* Enable UART I/O port */
1656 /* First init without port data
1679 struct uart_8250_port *port, int idx)
1691 port->port.private_data = data;
1692 port->port.iotype = UPIO_MEM;
1693 port->port.flags |= UPF_IOREMAP;
1694 port->port.mapbase = pci_resource_start(pdev, 0) + 8 * idx;
1695 port->port.serial_out = f815xxa_mem_serial_out;
1730 /* Enable UART I/O port */
1739 struct uart_8250_port *port, int idx)
1741 port->port.quirks |= UPQ_NO_TXEN_TEST;
1747 return pci_default_setup(priv, board, port, idx);
1768 * port registers could return 0 momentarily. Functions like
1786 struct uart_8250_port *port, int idx)
1788 port->port.flags |= UPF_BUG_THRE;
1789 port->port.serial_in = kt_serial_in;
1790 port->port.handle_break = kt_handle_break;
1791 return skip_tx_en_setup(priv, board, port, idx);
1806 struct uart_8250_port *port, int idx)
1808 port->port.flags |= UPF_FIXED_TYPE;
1809 port->port.type = PORT_16550A;
1810 return pci_default_setup(priv, board, port, idx);
1816 struct uart_8250_port *port, int idx)
1818 port->port.flags |= UPF_FIXED_TYPE;
1819 port->port.type = PORT_16550A;
1820 return pci_default_setup(priv, board, port, idx);
1826 struct uart_8250_port *port, int idx)
1828 port->port.flags |= UPF_FIXED_TYPE;
1829 port->port.type = PORT_16850;
1830 return pci_default_setup(priv, board, port, idx);
1869 struct uart_8250_port *port, int idx)
1874 port->port.flags |= UPF_FIXED_TYPE;
1875 port->port.type = PORT_SUNIX;
1887 return setup_port(priv, port, bar, offset, 0);
1893 struct uart_8250_port *port, int idx)
1903 return setup_port(priv, port, bar, offset, 0);
1979 * Master list of serial port init/setup/exit quirks.
1980 * This does not describe the general nature of the port.
2855 * offsetinhex = offset for each sequential port (in hex)
3524 * EKF addition for i960 Boards form EKF with serial port.
3901 * If there is 1 or 0 iomem regions, and exactly one port,
3991 uart.port.flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
3992 uart.port.uartclk = board->base_baud * 16;
3995 uart.port.irq = 0;
4000 uart.port.flags &= ~UPF_SHARE_IRQ;
4012 uart.port.irq = pci_irq_vector(dev, 0);
4015 uart.port.dev = &dev->dev;
4021 pci_dbg(dev, "Setup PCI port: port %lx, irq %d, type %d\n",
4022 uart.port.iobase, uart.port.irq, uart.port.iotype);
4027 "Couldn't register serial port %lx, irq %d, type %d, error %d\n",
4028 uart.port.iobase, uart.port.irq,
4029 uart.port.iotype, priv->line[i]);
4131 pci_warn(dev, "ignoring port, enable %s to handle\n",
4661 * Digi/IBM PCIe 2-port Async EIA-232 Adapter utilizing OxSemi Tornado
4982 * RAStel 2 port modem, gerg@moreton.com.au
4989 * EKF addition for i960 Boards form EKF with serial port