Lines Matching defs:PORT_CTRL
182 PORT_CTRL = 4,
519 dc->port[PORT_CTRL].dl_addr[CH_A] =
521 dc->port[PORT_CTRL].dl_size[CH_A] =
554 dc->port[PORT_CTRL].ul_addr[CH_A] =
556 dc->port[PORT_CTRL].ul_size[CH_A] =
877 read_mem32((u32 *) &ctrl_dl, dc->port[PORT_CTRL].dl_addr[CH_A], 2);
1001 write_mem32(dc->port[PORT_CTRL].ul_addr[0], \
1481 write_mem32(dc->port[PORT_CTRL].ul_addr[0], (u32 *)&ctrl, 2);
1510 enable_transmit_ul(PORT_CTRL, get_dc_by_tty(tty));
1521 enable_transmit_ul(PORT_CTRL, get_dc_by_tty(tty));