Lines Matching refs:value
67 * When LCR register (offset 0x03) is written the following value, the Must chip
90 /* set XON1 value register, when LCR=0xBF and change to bank0 */
93 /* set XON2 value register, when LCR=0xBF and change to bank0 */
96 /* set XOFF1 value register, when LCR=0xBF and change to bank0 */
99 /* set XOFF2 value register, when LCR=0xBF and change to bank0 */
138 #define MOXA_MUST_EFR_SF_MASK 0x0F /* software flow control on chip mask value */
323 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
326 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
330 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
333 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
346 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
349 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
1084 unsigned int __user *value)
1094 return put_user(result, value);