Lines Matching refs:baseio
297 static u8 __mxser_must_set_EFR(unsigned long baseio, u8 clear, u8 set,
302 oldlcr = inb(baseio + UART_LCR);
303 outb(MOXA_MUST_ENTER_ENHANCED, baseio + UART_LCR);
305 efr = inb(baseio + MOXA_MUST_EFR_REGISTER);
309 outb(efr, baseio + MOXA_MUST_EFR_REGISTER);
312 outb(oldlcr, baseio + UART_LCR);
317 static u8 mxser_must_select_bank(unsigned long baseio, u8 bank)
319 return __mxser_must_set_EFR(baseio, MOXA_MUST_EFR_BANK_MASK, bank,
323 static void mxser_set_must_xon1_value(unsigned long baseio, u8 value)
325 u8 oldlcr = mxser_must_select_bank(baseio, MOXA_MUST_EFR_BANK0);
326 outb(value, baseio + MOXA_MUST_XON1_REGISTER);
327 outb(oldlcr, baseio + UART_LCR);
330 static void mxser_set_must_xoff1_value(unsigned long baseio, u8 value)
332 u8 oldlcr = mxser_must_select_bank(baseio, MOXA_MUST_EFR_BANK0);
333 outb(value, baseio + MOXA_MUST_XOFF1_REGISTER);
334 outb(oldlcr, baseio + UART_LCR);
346 static void mxser_set_must_enum_value(unsigned long baseio, u8 value)
348 u8 oldlcr = mxser_must_select_bank(baseio, MOXA_MUST_EFR_BANK2);
349 outb(value, baseio + MOXA_MUST_ENUM_REGISTER);
350 outb(oldlcr, baseio + UART_LCR);
353 static u8 mxser_get_must_hardware_id(unsigned long baseio)
355 u8 oldlcr = mxser_must_select_bank(baseio, MOXA_MUST_EFR_BANK2);
356 u8 id = inb(baseio + MOXA_MUST_HWID_REGISTER);
357 outb(oldlcr, baseio + UART_LCR);
362 static void mxser_must_set_EFR(unsigned long baseio, u8 clear, u8 set)
364 __mxser_must_set_EFR(baseio, clear, set, true);
367 static void mxser_must_set_enhance_mode(unsigned long baseio, bool enable)
369 mxser_must_set_EFR(baseio,
374 static void mxser_must_no_sw_flow_control(unsigned long baseio)
376 mxser_must_set_EFR(baseio, MOXA_MUST_EFR_SF_MASK, 0);
379 static void mxser_must_set_tx_sw_flow_control(unsigned long baseio, bool enable)
381 mxser_must_set_EFR(baseio, MOXA_MUST_EFR_SF_TX_MASK,
385 static void mxser_must_set_rx_sw_flow_control(unsigned long baseio, bool enable)
387 mxser_must_set_EFR(baseio, MOXA_MUST_EFR_SF_RX_MASK,