Lines Matching refs:margining
196 * struct tb_margining - Lane margining support
197 * @caps: Port lane margining capabilities
198 * @results: Last lane margining results
207 * @software: %true if software margining is used instead of hardware
208 * @time: %true if time margining is used instead of voltage
230 return usb4->margining->caps[0] & USB4_MARGIN_CAP_0_MODES_SW;
235 return usb4->margining->caps[0] & USB4_MARGIN_CAP_0_MODES_HW;
240 return usb4->margining->caps[0] & USB4_MARGIN_CAP_0_2_LANES;
245 return (usb4->margining->caps[0] & USB4_MARGIN_CAP_0_VOLTAGE_INDP_MASK) >>
251 return usb4->margining->caps[0] & USB4_MARGIN_CAP_0_TIME;
257 return (usb4->margining->caps[1] & USB4_MARGIN_CAP_1_TIME_INDP_MASK) >>
276 if (usb4->margining->software) {
293 if (val < usb4->margining->min_ber_level ||
294 val > usb4->margining->max_ber_level) {
299 usb4->margining->ber_level = val;
322 if (usb4->margining->software)
324 ber_level_show(s, usb4->margining->ber_level);
340 cap0 = usb4->margining->caps[0];
342 cap1 = usb4->margining->caps[1];
345 seq_printf(s, "# software margining: %s\n",
348 seq_puts(s, "# hardware margining: yes\n");
350 ber_level_show(s, usb4->margining->min_ber_level);
352 ber_level_show(s, usb4->margining->max_ber_level);
354 seq_puts(s, "# hardware margining: no\n");
360 usb4->margining->voltage_steps);
362 usb4->margining->max_voltage_offset);
377 seq_puts(s, "# time margining: yes\n");
378 seq_printf(s, "# time margining is destructive: %s\n",
394 usb4->margining->time_steps);
396 usb4->margining->max_time_offset);
398 seq_puts(s, "# time margining: no\n");
429 usb4->margining->lanes = 0;
431 usb4->margining->lanes = 1;
435 usb4->margining->lanes = 7;
459 lanes = usb4->margining->lanes;
503 usb4->margining->software = true;
508 usb4->margining->software = false;
533 if (usb4->margining->software)
540 if (usb4->margining->software)
558 struct tb_margining *margining;
582 * CL states may interfere with lane margining so
593 margining = usb4->margining;
595 if (margining->software) {
596 tb_port_dbg(port, "running software %s lane margining for lanes %u\n",
597 margining->time ? "time" : "voltage", margining->lanes);
598 ret = usb4_port_sw_margin(port, margining->lanes, margining->time,
599 margining->right_high,
604 ret = usb4_port_sw_margin_errors(port, &margining->results[0]);
606 tb_port_dbg(port, "running hardware %s lane margining for lanes %u\n",
607 margining->time ? "time" : "voltage", margining->lanes);
609 margining->results[0] = 0;
610 margining->results[1] = 0;
611 ret = usb4_port_hw_margin(port, margining->lanes,
612 margining->ber_level, margining->time,
613 margining->right_high, margining->results);
643 usb4->margining->results[0] = 0;
644 usb4->margining->results[1] = 0;
651 const struct tb_margining *margining, u8 val)
656 voltage = tmp * margining->max_voltage_offset / margining->voltage_steps;
664 const struct tb_margining *margining, u8 val)
669 interval = tmp * margining->max_time_offset / margining->time_steps;
680 struct tb_margining *margining;
686 margining = usb4->margining;
688 seq_printf(s, "0x%08x\n", margining->results[0]);
689 /* Only the hardware margining has two result dwords */
690 if (!margining->software) {
693 seq_printf(s, "0x%08x\n", margining->results[1]);
695 if (margining->time) {
696 if (!margining->lanes || margining->lanes == 7) {
697 val = margining->results[1];
699 time_margin_show(s, margining, val);
700 val = margining->results[1] >>
703 time_margin_show(s, margining, val);
705 if (margining->lanes == 1 || margining->lanes == 7) {
706 val = margining->results[1] >>
709 time_margin_show(s, margining, val);
710 val = margining->results[1] >>
713 time_margin_show(s, margining, val);
716 if (!margining->lanes || margining->lanes == 7) {
717 val = margining->results[1];
719 voltage_margin_show(s, margining, val);
720 val = margining->results[1] >>
723 voltage_margin_show(s, margining, val);
725 if (margining->lanes == 1 || margining->lanes == 7) {
726 val = margining->results[1] >>
729 voltage_margin_show(s, margining, val);
730 val = margining->results[1] >>
733 voltage_margin_show(s, margining, val);
766 usb4->margining->time = true;
768 usb4->margining->time = false;
789 if (usb4->margining->time)
824 if (usb4->margining->time) {
826 usb4->margining->right_high = false;
828 usb4->margining->right_high = true;
833 usb4->margining->right_high = false;
835 usb4->margining->right_high = true;
856 if (usb4->margining->time) {
857 if (usb4->margining->right_high)
862 if (usb4->margining->right_high)
875 struct tb_margining *margining;
889 margining = kzalloc(sizeof(*margining), GFP_KERNEL);
890 if (!margining)
893 ret = usb4_port_margining_caps(port, margining->caps);
895 kfree(margining);
899 usb4->margining = margining;
903 margining->software = true;
905 val = (margining->caps[0] & USB4_MARGIN_CAP_0_VOLTAGE_STEPS_MASK) >>
907 margining->voltage_steps = val;
908 val = (margining->caps[0] & USB4_MARGIN_CAP_0_MAX_VOLTAGE_OFFSET_MASK) >>
910 margining->max_voltage_offset = 74 + val * 2;
913 val = (margining->caps[1] & USB4_MARGIN_CAP_1_TIME_STEPS_MASK) >>
915 margining->time_steps = val;
916 val = (margining->caps[1] & USB4_MARGIN_CAP_1_TIME_OFFSET_MASK) >>
922 margining->max_time_offset = 200 + 10 * val;
925 dir = debugfs_create_dir("margining", parent);
927 val = (margining->caps[1] & USB4_MARGIN_CAP_1_MIN_BER_MASK) >>
929 margining->min_ber_level = val;
930 val = (margining->caps[1] & USB4_MARGIN_CAP_1_MAX_BER_MASK) >>
932 margining->max_ber_level = val;
935 margining->ber_level = margining->min_ber_level;
962 debugfs_lookup_and_remove("margining", parent);
964 kfree(port->usb4->margining);
965 port->usb4->margining = NULL;