Lines Matching refs:thm
149 struct sprd_thermal_data *thm,
163 ratio += thm->ratio_sign * thm->ratio_off;
172 sen->cal_slope = (thm->var_data->ideal_k * ratio) / 1000;
173 sen->cal_offset = thm->var_data->ideal_b + (dt_offset - 128) * 250;
224 static int sprd_thm_poll_ready_status(struct sprd_thermal_data *thm)
232 ret = readl_poll_timeout(thm->base + SPRD_THM_CTL, val,
239 sprd_thm_update_bits(thm->base + SPRD_THM_CTL, SPRD_THM_MON_EN,
241 sprd_thm_update_bits(thm->base + SPRD_THM_CTL, SPRD_THM_SET_RDY,
246 static int sprd_thm_wait_temp_ready(struct sprd_thermal_data *thm)
251 return readl_poll_timeout(thm->base + SPRD_THM_INTERNAL_STS1, val,
257 static int sprd_thm_set_ready(struct sprd_thermal_data *thm)
261 ret = sprd_thm_poll_ready_status(thm);
274 writel(SPRD_THM_INT_CLR_MASK, thm->base + SPRD_THM_INT_CLR);
275 sprd_thm_update_bits(thm->base + SPRD_THM_INT_EN,
277 sprd_thm_update_bits(thm->base + SPRD_THM_CTL,
282 static void sprd_thm_sensor_init(struct sprd_thermal_data *thm,
291 sprd_thm_update_bits(thm->base + SPRD_THM_INT_EN,
296 sprd_thm_update_bits(thm->base + SPRD_THM_THRES(sen->id),
302 sprd_thm_update_bits(thm->base + SPRD_THM_CTL, SPRD_THM_SEN(sen->id),
306 static void sprd_thm_para_config(struct sprd_thermal_data *thm)
309 sprd_thm_update_bits(thm->base + SPRD_THM_DET_PERIOD,
313 sprd_thm_update_bits(thm->base + SPRD_THM_MON_CTL,
317 sprd_thm_update_bits(thm->base + SPRD_THM_MON_PERIOD,
335 struct sprd_thermal_data *thm;
347 thm = devm_kzalloc(&pdev->dev, sizeof(*thm), GFP_KERNEL);
348 if (!thm)
351 thm->var_data = pdata;
352 thm->base = devm_platform_ioremap_resource(pdev, 0);
353 if (IS_ERR(thm->base))
354 return PTR_ERR(thm->base);
356 thm->nr_sensors = of_get_child_count(np);
357 if (thm->nr_sensors == 0 || thm->nr_sensors > SPRD_THM_MAX_SENSOR) {
362 thm->clk = devm_clk_get(&pdev->dev, "enable");
363 if (IS_ERR(thm->clk)) {
365 return PTR_ERR(thm->clk);
368 ret = clk_prepare_enable(thm->clk);
372 sprd_thm_para_config(thm);
379 thm->ratio_sign = -1;
381 thm->ratio_sign = 1;
383 ret = sprd_thm_cal_read(np, "thm_ratio_cal", &thm->ratio_off);
394 sen->data = thm;
403 ret = sprd_thm_sensor_calibration(sen_child, thm, sen);
409 sprd_thm_sensor_init(thm, sen);
422 thm->sensor[sen->id] = sen;
426 ret = sprd_thm_set_ready(thm);
430 ret = sprd_thm_wait_temp_ready(thm);
434 for (i = 0; i < thm->nr_sensors; i++)
435 sprd_thm_toggle_sensor(thm->sensor[i], true);
437 platform_set_drvdata(pdev, thm);
443 clk_disable_unprepare(thm->clk);
448 static void sprd_thm_hw_suspend(struct sprd_thermal_data *thm)
452 for (i = 0; i < thm->nr_sensors; i++) {
453 sprd_thm_update_bits(thm->base + SPRD_THM_CTL,
454 SPRD_THM_SEN(thm->sensor[i]->id), 0);
457 sprd_thm_update_bits(thm->base + SPRD_THM_CTL,
463 struct sprd_thermal_data *thm = dev_get_drvdata(dev);
466 for (i = 0; i < thm->nr_sensors; i++)
467 sprd_thm_toggle_sensor(thm->sensor[i], false);
469 sprd_thm_hw_suspend(thm);
470 clk_disable_unprepare(thm->clk);
475 static int sprd_thm_hw_resume(struct sprd_thermal_data *thm)
479 for (i = 0; i < thm->nr_sensors; i++) {
480 sprd_thm_update_bits(thm->base + SPRD_THM_CTL,
481 SPRD_THM_SEN(thm->sensor[i]->id),
482 SPRD_THM_SEN(thm->sensor[i]->id));
485 ret = sprd_thm_poll_ready_status(thm);
489 writel(SPRD_THM_INT_CLR_MASK, thm->base + SPRD_THM_INT_CLR);
490 sprd_thm_update_bits(thm->base + SPRD_THM_CTL,
492 return sprd_thm_wait_temp_ready(thm);
497 struct sprd_thermal_data *thm = dev_get_drvdata(dev);
500 ret = clk_prepare_enable(thm->clk);
504 ret = sprd_thm_hw_resume(thm);
508 for (i = 0; i < thm->nr_sensors; i++)
509 sprd_thm_toggle_sensor(thm->sensor[i], true);
514 clk_disable_unprepare(thm->clk);
521 struct sprd_thermal_data *thm = platform_get_drvdata(pdev);
524 for (i = 0; i < thm->nr_sensors; i++) {
525 sprd_thm_toggle_sensor(thm->sensor[i], false);
527 thm->sensor[i]->tzd);
530 clk_disable_unprepare(thm->clk);