Lines Matching refs:data
139 * struct exynos_tmu_data : A structure to hold the private data of the TMU
153 * @min_efuse_value: minimum valid trimming data
154 * @max_efuse_value: maximum valid trimming data
196 void (*tmu_set_trip_temp)(struct exynos_tmu_data *data, int trip,
198 void (*tmu_set_trip_hyst)(struct exynos_tmu_data *data, int trip,
202 int (*tmu_read)(struct exynos_tmu_data *data);
203 void (*tmu_set_emulation)(struct exynos_tmu_data *data, int temp);
204 void (*tmu_clear_irqs)(struct exynos_tmu_data *data);
211 static int temp_to_code(struct exynos_tmu_data *data, u8 temp)
213 if (data->cal_type == TYPE_ONE_POINT_TRIMMING)
214 return temp + data->temp_error1 - EXYNOS_FIRST_POINT_TRIM;
217 (data->temp_error2 - data->temp_error1) /
219 data->temp_error1;
226 static int code_to_temp(struct exynos_tmu_data *data, u16 temp_code)
228 if (data->cal_type == TYPE_ONE_POINT_TRIMMING)
229 return temp_code - data->temp_error1 + EXYNOS_FIRST_POINT_TRIM;
231 return (temp_code - data->temp_error1) *
233 (data->temp_error2 - data->temp_error1) +
237 static void sanitize_temp_error(struct exynos_tmu_data *data, u32 trim_info)
240 (data->soc == SOC_ARCH_EXYNOS7) ? EXYNOS7_TMU_TEMP_MASK
243 data->temp_error1 = trim_info & tmu_temp_mask;
244 data->temp_error2 = ((trim_info >> EXYNOS_TRIMINFO_85_SHIFT) &
247 if (!data->temp_error1 ||
248 (data->min_efuse_value > data->temp_error1) ||
249 (data->temp_error1 > data->max_efuse_value))
250 data->temp_error1 = data->efuse_value & EXYNOS_TMU_TEMP_MASK;
252 if (!data->temp_error2)
253 data->temp_error2 =
254 (data->efuse_value >> EXYNOS_TRIMINFO_85_SHIFT) &
260 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
261 struct thermal_zone_device *tzd = data->tzd;
267 if (ret && data->soc != SOC_ARCH_EXYNOS5433) { /* FIXME */
273 if (num_trips > data->ntrip) {
278 num_trips - data->ntrip);
281 mutex_lock(&data->lock);
282 clk_enable(data->clk);
283 if (!IS_ERR(data->clk_sec))
284 clk_enable(data->clk_sec);
286 status = readb(data->base + EXYNOS_TMU_REG_STATUS);
291 min_t(int, num_trips, data->ntrip);
293 data->tmu_initialize(pdev);
304 data->tmu_set_trip_temp(data, i, trip.temperature / MCELSIUS);
305 data->tmu_set_trip_hyst(data, i, trip.temperature / MCELSIUS,
309 data->tmu_clear_irqs(data);
312 clk_disable(data->clk);
313 mutex_unlock(&data->lock);
314 if (!IS_ERR(data->clk_sec))
315 clk_disable(data->clk_sec);
320 static u32 get_con_reg(struct exynos_tmu_data *data, u32 con)
322 if (data->soc == SOC_ARCH_EXYNOS4412 ||
323 data->soc == SOC_ARCH_EXYNOS3250)
327 con |= data->reference_voltage << EXYNOS_TMU_REF_VOLTAGE_SHIFT;
330 con |= (data->gain << EXYNOS_TMU_BUF_SLOPE_SEL_SHIFT);
340 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
342 mutex_lock(&data->lock);
343 clk_enable(data->clk);
344 data->tmu_control(pdev, on);
345 data->enabled = on;
346 clk_disable(data->clk);
347 mutex_unlock(&data->lock);
350 static void exynos4210_tmu_set_trip_temp(struct exynos_tmu_data *data,
356 if (thermal_zone_get_trip(data->tzd, 0, &trip))
362 th_code = temp_to_code(data, ref);
363 writeb(th_code, data->base + EXYNOS4210_TMU_REG_THRESHOLD_TEMP);
367 writeb(temp, data->base + EXYNOS4210_TMU_REG_TRIG_LEVEL0 + trip_id * 4);
371 static void exynos4210_tmu_set_trip_hyst(struct exynos_tmu_data *data,
378 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
380 sanitize_temp_error(data, readl(data->base + EXYNOS_TMU_REG_TRIMINFO));
383 static void exynos4412_tmu_set_trip_temp(struct exynos_tmu_data *data,
388 th = readl(data->base + EXYNOS_THD_TEMP_RISE);
390 th |= temp_to_code(data, temp) << 8 * trip;
391 writel(th, data->base + EXYNOS_THD_TEMP_RISE);
394 con = readl(data->base + EXYNOS_TMU_REG_CONTROL);
396 writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
400 static void exynos4412_tmu_set_trip_hyst(struct exynos_tmu_data *data,
405 th = readl(data->base + EXYNOS_THD_TEMP_FALL);
408 th |= temp_to_code(data, temp - hyst) << 8 * trip;
409 writel(th, data->base + EXYNOS_THD_TEMP_FALL);
414 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
417 if (data->soc == SOC_ARCH_EXYNOS3250 ||
418 data->soc == SOC_ARCH_EXYNOS4412 ||
419 data->soc == SOC_ARCH_EXYNOS5250) {
420 if (data->soc == SOC_ARCH_EXYNOS3250) {
421 ctrl = readl(data->base + EXYNOS_TMU_TRIMINFO_CON1);
423 writel(ctrl, data->base + EXYNOS_TMU_TRIMINFO_CON1);
425 ctrl = readl(data->base + EXYNOS_TMU_TRIMINFO_CON2);
427 writel(ctrl, data->base + EXYNOS_TMU_TRIMINFO_CON2);
431 if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO)
432 trim_info = readl(data->base_second + EXYNOS_TMU_REG_TRIMINFO);
434 trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
436 sanitize_temp_error(data, trim_info);
439 static void exynos5433_tmu_set_trip_temp(struct exynos_tmu_data *data,
453 th = readl(data->base + reg_off);
455 th |= (temp_to_code(data, temp) << j * 8);
456 writel(th, data->base + reg_off);
459 static void exynos5433_tmu_set_trip_hyst(struct exynos_tmu_data *data,
473 th = readl(data->base + reg_off);
475 th |= (temp_to_code(data, temp - hyst) << j * 8);
476 writel(th, data->base + reg_off);
481 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
485 trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
486 sanitize_temp_error(data, trim_info);
494 writel(trim_info, data->base + EXYNOS_TMU_REG_TRIMINFO);
500 data->cal_type = TYPE_TWO_POINT_TRIMMING;
504 data->cal_type = TYPE_ONE_POINT_TRIMMING;
512 static void exynos7_tmu_set_trip_temp(struct exynos_tmu_data *data,
521 th = readl(data->base + EXYNOS7_THD_TEMP_RISE7_6 + reg_off);
523 th |= temp_to_code(data, temp) << (16 * bit_off);
524 writel(th, data->base + EXYNOS7_THD_TEMP_RISE7_6 + reg_off);
527 static void exynos7_tmu_set_trip_hyst(struct exynos_tmu_data *data,
536 th = readl(data->base + EXYNOS7_THD_TEMP_FALL7_6 + reg_off);
538 th |= temp_to_code(data, temp - hyst) << (16 * bit_off);
539 writel(th, data->base + EXYNOS7_THD_TEMP_FALL7_6 + reg_off);
544 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
547 trim_info = readl(data->base + EXYNOS_TMU_REG_TRIMINFO);
548 sanitize_temp_error(data, trim_info);
553 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
554 struct thermal_zone_device *tz = data->tzd;
558 con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
561 for (i = 0; i < data->ntrip; i++) {
569 if (data->soc != SOC_ARCH_EXYNOS4210)
578 writel(interrupt_en, data->base + EXYNOS_TMU_REG_INTEN);
579 writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
584 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
585 struct thermal_zone_device *tz = data->tzd;
589 con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
592 for (i = 0; i < data->ntrip; i++) {
609 writel(pd_det_en, data->base + EXYNOS5433_TMU_PD_DET_EN);
610 writel(interrupt_en, data->base + EXYNOS5433_TMU_REG_INTEN);
611 writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
616 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
617 struct thermal_zone_device *tz = data->tzd;
621 con = get_con_reg(data, readl(data->base + EXYNOS_TMU_REG_CONTROL));
624 for (i = 0; i < data->ntrip; i++) {
642 writel(interrupt_en, data->base + EXYNOS7_TMU_REG_INTEN);
643 writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
648 struct exynos_tmu_data *data = thermal_zone_device_priv(tz);
651 if (!data || !data->tmu_read)
653 else if (!data->enabled)
660 mutex_lock(&data->lock);
661 clk_enable(data->clk);
663 value = data->tmu_read(data);
667 *temp = code_to_temp(data, value) * MCELSIUS;
669 clk_disable(data->clk);
670 mutex_unlock(&data->lock);
676 static u32 get_emul_con_reg(struct exynos_tmu_data *data, unsigned int val,
684 if (data->soc == SOC_ARCH_EXYNOS7) {
687 val |= (temp_to_code(data, temp) <<
693 val |= (temp_to_code(data, temp) <<
704 static void exynos4412_tmu_set_emulation(struct exynos_tmu_data *data,
710 if (data->soc == SOC_ARCH_EXYNOS5260)
712 else if (data->soc == SOC_ARCH_EXYNOS5433)
714 else if (data->soc == SOC_ARCH_EXYNOS7)
719 val = readl(data->base + emul_con);
720 val = get_emul_con_reg(data, val, temp);
721 writel(val, data->base + emul_con);
726 struct exynos_tmu_data *data = thermal_zone_device_priv(tz);
729 if (data->soc == SOC_ARCH_EXYNOS4210)
735 mutex_lock(&data->lock);
736 clk_enable(data->clk);
737 data->tmu_set_emulation(data, temp);
738 clk_disable(data->clk);
739 mutex_unlock(&data->lock);
750 static int exynos4210_tmu_read(struct exynos_tmu_data *data)
752 int ret = readb(data->base + EXYNOS_TMU_REG_CURRENT_TEMP);
758 static int exynos4412_tmu_read(struct exynos_tmu_data *data)
760 return readb(data->base + EXYNOS_TMU_REG_CURRENT_TEMP);
763 static int exynos7_tmu_read(struct exynos_tmu_data *data)
765 return readw(data->base + EXYNOS_TMU_REG_CURRENT_TEMP) &
771 struct exynos_tmu_data *data = container_of(work,
774 thermal_zone_device_update(data->tzd, THERMAL_EVENT_UNSPECIFIED);
776 mutex_lock(&data->lock);
777 clk_enable(data->clk);
780 data->tmu_clear_irqs(data);
782 clk_disable(data->clk);
783 mutex_unlock(&data->lock);
784 enable_irq(data->irq);
787 static void exynos4210_tmu_clear_irqs(struct exynos_tmu_data *data)
792 if (data->soc == SOC_ARCH_EXYNOS5260) {
795 } else if (data->soc == SOC_ARCH_EXYNOS7) {
798 } else if (data->soc == SOC_ARCH_EXYNOS5433) {
806 val_irq = readl(data->base + tmu_intstat);
815 writel(val_irq, data->base + tmu_intclear);
820 struct exynos_tmu_data *data = id;
823 schedule_work(&data->irq_work);
831 .data = (const void *)SOC_ARCH_EXYNOS3250,
834 .data = (const void *)SOC_ARCH_EXYNOS4210,
837 .data = (const void *)SOC_ARCH_EXYNOS4412,
840 .data = (const void *)SOC_ARCH_EXYNOS5250,
843 .data = (const void *)SOC_ARCH_EXYNOS5260,
846 .data = (const void *)SOC_ARCH_EXYNOS5420,
849 .data = (const void *)SOC_ARCH_EXYNOS5420_TRIMINFO,
852 .data = (const void *)SOC_ARCH_EXYNOS5433,
855 .data = (const void *)SOC_ARCH_EXYNOS7,
863 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
866 if (!data || !pdev->dev.of_node)
869 data->id = of_alias_get_id(pdev->dev.of_node, "tmuctrl");
870 if (data->id < 0)
871 data->id = 0;
873 data->irq = irq_of_parse_and_map(pdev->dev.of_node, 0);
874 if (data->irq <= 0) {
884 data->base = devm_ioremap(&pdev->dev, res.start, resource_size(&res));
885 if (!data->base) {
890 data->soc = (uintptr_t)of_device_get_match_data(&pdev->dev);
892 switch (data->soc) {
894 data->tmu_set_trip_temp = exynos4210_tmu_set_trip_temp;
895 data->tmu_set_trip_hyst = exynos4210_tmu_set_trip_hyst;
896 data->tmu_initialize = exynos4210_tmu_initialize;
897 data->tmu_control = exynos4210_tmu_control;
898 data->tmu_read = exynos4210_tmu_read;
899 data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
900 data->ntrip = 4;
901 data->gain = 15;
902 data->reference_voltage = 7;
903 data->efuse_value = 55;
904 data->min_efuse_value = 40;
905 data->max_efuse_value = 100;
913 data->tmu_set_trip_temp = exynos4412_tmu_set_trip_temp;
914 data->tmu_set_trip_hyst = exynos4412_tmu_set_trip_hyst;
915 data->tmu_initialize = exynos4412_tmu_initialize;
916 data->tmu_control = exynos4210_tmu_control;
917 data->tmu_read = exynos4412_tmu_read;
918 data->tmu_set_emulation = exynos4412_tmu_set_emulation;
919 data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
920 data->ntrip = 4;
921 data->gain = 8;
922 data->reference_voltage = 16;
923 data->efuse_value = 55;
924 if (data->soc != SOC_ARCH_EXYNOS5420 &&
925 data->soc != SOC_ARCH_EXYNOS5420_TRIMINFO)
926 data->min_efuse_value = 40;
928 data->min_efuse_value = 0;
929 data->max_efuse_value = 100;
932 data->tmu_set_trip_temp = exynos5433_tmu_set_trip_temp;
933 data->tmu_set_trip_hyst = exynos5433_tmu_set_trip_hyst;
934 data->tmu_initialize = exynos5433_tmu_initialize;
935 data->tmu_control = exynos5433_tmu_control;
936 data->tmu_read = exynos4412_tmu_read;
937 data->tmu_set_emulation = exynos4412_tmu_set_emulation;
938 data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
939 data->ntrip = 8;
940 data->gain = 8;
942 data->reference_voltage = 23;
944 data->reference_voltage = 16;
945 data->efuse_value = 75;
946 data->min_efuse_value = 40;
947 data->max_efuse_value = 150;
950 data->tmu_set_trip_temp = exynos7_tmu_set_trip_temp;
951 data->tmu_set_trip_hyst = exynos7_tmu_set_trip_hyst;
952 data->tmu_initialize = exynos7_tmu_initialize;
953 data->tmu_control = exynos7_tmu_control;
954 data->tmu_read = exynos7_tmu_read;
955 data->tmu_set_emulation = exynos4412_tmu_set_emulation;
956 data->tmu_clear_irqs = exynos4210_tmu_clear_irqs;
957 data->ntrip = 8;
958 data->gain = 9;
959 data->reference_voltage = 17;
960 data->efuse_value = 75;
961 data->min_efuse_value = 15;
962 data->max_efuse_value = 100;
969 data->cal_type = TYPE_ONE_POINT_TRIMMING;
975 if (data->soc != SOC_ARCH_EXYNOS5420_TRIMINFO)
983 data->base_second = devm_ioremap(&pdev->dev, res.start,
985 if (!data->base_second) {
1000 struct exynos_tmu_data *data;
1003 data = devm_kzalloc(&pdev->dev, sizeof(struct exynos_tmu_data),
1005 if (!data)
1008 platform_set_drvdata(pdev, data);
1009 mutex_init(&data->lock);
1016 data->regulator = devm_regulator_get_optional(&pdev->dev, "vtmu");
1017 if (!IS_ERR(data->regulator)) {
1018 ret = regulator_enable(data->regulator);
1024 if (PTR_ERR(data->regulator) == -EPROBE_DEFER)
1033 INIT_WORK(&data->irq_work, exynos_tmu_work);
1035 data->clk = devm_clk_get(&pdev->dev, "tmu_apbif");
1036 if (IS_ERR(data->clk)) {
1038 ret = PTR_ERR(data->clk);
1042 data->clk_sec = devm_clk_get(&pdev->dev, "tmu_triminfo_apbif");
1043 if (IS_ERR(data->clk_sec)) {
1044 if (data->soc == SOC_ARCH_EXYNOS5420_TRIMINFO) {
1046 ret = PTR_ERR(data->clk_sec);
1050 ret = clk_prepare(data->clk_sec);
1057 ret = clk_prepare(data->clk);
1063 switch (data->soc) {
1066 data->sclk = devm_clk_get(&pdev->dev, "tmu_sclk");
1067 if (IS_ERR(data->sclk)) {
1069 ret = PTR_ERR(data->sclk);
1072 ret = clk_prepare_enable(data->sclk);
1084 * data->tzd must be registered before calling exynos_tmu_initialize(),
1087 data->tzd = devm_thermal_of_zone_register(&pdev->dev, 0, data,
1089 if (IS_ERR(data->tzd)) {
1090 ret = PTR_ERR(data->tzd);
1103 ret = devm_request_irq(&pdev->dev, data->irq, exynos_tmu_irq,
1104 IRQF_TRIGGER_RISING | IRQF_SHARED, dev_name(&pdev->dev), data);
1106 dev_err(&pdev->dev, "Failed to request irq: %d\n", data->irq);
1114 clk_disable_unprepare(data->sclk);
1116 clk_unprepare(data->clk);
1118 if (!IS_ERR(data->clk_sec))
1119 clk_unprepare(data->clk_sec);
1121 if (!IS_ERR(data->regulator))
1122 regulator_disable(data->regulator);
1129 struct exynos_tmu_data *data = platform_get_drvdata(pdev);
1133 clk_disable_unprepare(data->sclk);
1134 clk_unprepare(data->clk);
1135 if (!IS_ERR(data->clk_sec))
1136 clk_unprepare(data->clk_sec);
1138 if (!IS_ERR(data->regulator))
1139 regulator_disable(data->regulator);