Lines Matching defs:zynq_qspi_write
154 static inline void zynq_qspi_write(struct zynq_qspi *xqspi, u32 offset,
185 zynq_qspi_write(xqspi, ZYNQ_QSPI_ENABLE_OFFSET, 0);
186 zynq_qspi_write(xqspi, ZYNQ_QSPI_IDIS_OFFSET, ZYNQ_QSPI_IXR_ALL_MASK);
194 zynq_qspi_write(xqspi, ZYNQ_QSPI_LINEAR_CFG_OFFSET, config_reg);
201 zynq_qspi_write(xqspi, ZYNQ_QSPI_STATUS_OFFSET, ZYNQ_QSPI_IXR_ALL_MASK);
214 zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg);
216 zynq_qspi_write(xqspi, ZYNQ_QSPI_RX_THRESH_OFFSET,
218 zynq_qspi_write(xqspi, ZYNQ_QSPI_TX_THRESH_OFFSET,
221 zynq_qspi_write(xqspi, ZYNQ_QSPI_ENABLE_OFFSET,
282 zynq_qspi_write(xqspi, offset[size - 1], data);
304 zynq_qspi_write(xqspi, ZYNQ_QSPI_LINEAR_CFG_OFFSET, config_reg);
314 zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg);
364 zynq_qspi_write(xqspi, ZYNQ_QSPI_CONFIG_OFFSET, config_reg);
388 zynq_qspi_write(qspi, ZYNQ_QSPI_ENABLE_OFFSET,
480 zynq_qspi_write(xqspi, ZYNQ_QSPI_STATUS_OFFSET, intr_status);
502 zynq_qspi_write(xqspi,
546 zynq_qspi_write(xqspi, ZYNQ_QSPI_IEN_OFFSET,
564 zynq_qspi_write(xqspi, ZYNQ_QSPI_IEN_OFFSET,
583 zynq_qspi_write(xqspi, ZYNQ_QSPI_IEN_OFFSET,
607 zynq_qspi_write(xqspi, ZYNQ_QSPI_IEN_OFFSET,
748 zynq_qspi_write(xqspi, ZYNQ_QSPI_ENABLE_OFFSET, 0);