Lines Matching refs:PCH_SPCR
23 #define PCH_SPCR 0x00 /* SPI control register */
250 pch_spi_setclr_reg(master, PCH_SPCR, SPCR_MSTR_BIT, 0);
259 pch_spi_setclr_reg(master, PCH_SPCR, SPCR_FICLR_BIT, 0);
260 pch_spi_setclr_reg(master, PCH_SPCR, 0, SPCR_FICLR_BIT);
297 reg_spcr_val = ioread32(io_remap_addr + PCH_SPCR);
304 iowrite32(reg_spcr_val, (io_remap_addr + PCH_SPCR));
315 pch_spi_setclr_reg(data->master, PCH_SPCR, 0,
436 pch_spi_setclr_reg(spi->master, PCH_SPCR, flags,
665 pch_spi_setclr_reg(data->master, PCH_SPCR,
672 pch_spi_setclr_reg(data->master, PCH_SPCR,
689 pch_spi_setclr_reg(data->master, PCH_SPCR, 0, PCH_ALL | SPCR_SPE_BIT);
753 pch_spi_setclr_reg(data->master, PCH_SPCR, SPCR_SPE_BIT, PCH_ALL);
783 pch_spi_setclr_reg(data->master, PCH_SPCR, 0,
977 pch_spi_setclr_reg(data->master, PCH_SPCR,
1430 pch_spi_setclr_reg(data->master, PCH_SPCR, 0, PCH_ALL);
1466 pch_spi_setclr_reg(data->master, PCH_SPCR, 0, PCH_ALL);