Lines Matching defs:tegra_spi_writel
232 static inline void tegra_spi_writel(struct tegra_spi_data *tspi,
248 tegra_spi_writel(tspi, val, SPI_TRANS_STATUS);
253 tegra_spi_writel(tspi, SPI_ERR | SPI_FIFO_ERROR,
316 tegra_spi_writel(tspi, x, SPI_TX_FIFO);
334 tegra_spi_writel(tspi, x, SPI_TX_FIFO);
518 tegra_spi_writel(tspi, status, SPI_FIFO_STATUS);
544 tegra_spi_writel(tspi, val, SPI_DMA_BLK);
572 tegra_spi_writel(tspi, val, SPI_DMA_CTL);
624 tegra_spi_writel(tspi, val, SPI_DMA_CTL);
640 tegra_spi_writel(tspi, val, SPI_DMA_BLK);
649 tegra_spi_writel(tspi, val, SPI_DMA_CTL);
656 tegra_spi_writel(tspi, val, SPI_COMMAND1);
749 tegra_spi_writel(tspi, spi_cs_timing, SPI_CS_TIMING1);
764 tegra_spi_writel(tspi, spi_cs_timing, SPI_CS_TIMING2);
823 tegra_spi_writel(tspi, command1, SPI_COMMAND1);
826 tegra_spi_writel(tspi, command1, SPI_COMMAND1);
852 tegra_spi_writel(tspi, command2, SPI_COMMAND2);
895 tegra_spi_writel(tspi, command1, SPI_COMMAND1);
973 tegra_spi_writel(tspi, val, SPI_INTR_MASK);
987 tegra_spi_writel(tspi, tspi->def_command1_reg, SPI_COMMAND1);
1008 tegra_spi_writel(tspi, tspi->command1_reg, SPI_COMMAND1);
1011 tegra_spi_writel(tspi, tspi->def_command1_reg, SPI_COMMAND1);
1400 tegra_spi_writel(tspi, tspi->def_command1_reg, SPI_COMMAND1);
1474 tegra_spi_writel(tspi, tspi->command1_reg, SPI_COMMAND1);
1475 tegra_spi_writel(tspi, tspi->def_command2_reg, SPI_COMMAND2);