Lines Matching defs:spi
15 #include <linux/spi/spi.h>
18 #include <linux/platform_data/spi-s3c64xx.h>
146 * differ in some aspects such as the size of the fifo and spi bus clock
164 * @clk: Pointer to the spi clock.
329 static void s3c64xx_spi_set_cs(struct spi_device *spi, bool enable)
332 spi_controller_get_devdata(spi->controller);
354 static int s3c64xx_spi_prepare_transfer(struct spi_controller *spi)
356 struct s3c64xx_spi_driver_data *sdd = spi_controller_get_devdata(spi);
378 spi->dma_rx = sdd->rx_dma.ch;
379 spi->dma_tx = sdd->tx_dma.ch;
384 static int s3c64xx_spi_unprepare_transfer(struct spi_controller *spi)
386 struct s3c64xx_spi_driver_data *sdd = spi_controller_get_devdata(spi);
403 struct spi_device *spi,
719 struct spi_device *spi = msg->spi;
720 struct s3c64xx_spi_csinfo *cs = spi->controller_data;
732 static size_t s3c64xx_spi_max_transfer_size(struct spi_device *spi)
734 struct spi_controller *ctlr = spi->controller;
740 struct spi_device *spi,
766 sdd->cur_mode = spi->mode;
823 s3c64xx_spi_set_cs(spi, true);
830 dev_err(&spi->dev, "failed to enable data path for transfer: %d\n", status);
840 dev_err(&spi->dev,
854 dev_err(&spi->dev, "TX residue: %d\n", s.residue);
861 dev_err(&spi->dev, "RX residue: %d\n", s.residue);
894 struct spi_device *spi)
900 target_np = spi->dev.of_node;
902 dev_err(&spi->dev, "device node not found\n");
912 dev_info(&spi->dev, "feedback delay set to default (0)\n");
916 of_property_read_u32(data_np, "samsung,spi-feedback-delay", &fb_delay);
928 static int s3c64xx_spi_setup(struct spi_device *spi)
930 struct s3c64xx_spi_csinfo *cs = spi->controller_data;
935 sdd = spi_controller_get_devdata(spi->controller);
936 if (spi->dev.of_node) {
937 cs = s3c64xx_get_target_ctrldata(spi);
938 spi->controller_data = cs;
943 dev_err(&spi->dev, "No CS for SPI(%d)\n", spi_get_chipselect(spi, 0));
947 if (!spi_get_ctldata(spi))
948 spi_set_ctldata(spi, cs);
961 if (spi->max_speed_hz > speed)
962 spi->max_speed_hz = speed;
964 psr = clk_get_rate(sdd->src_clk) / div / spi->max_speed_hz - 1;
970 if (spi->max_speed_hz < speed) {
980 if (spi->max_speed_hz >= speed) {
981 spi->max_speed_hz = speed;
983 dev_err(&spi->dev, "Can't set %dHz transfer speed\n",
984 spi->max_speed_hz);
992 s3c64xx_spi_set_cs(spi, false);
1000 s3c64xx_spi_set_cs(spi, false);
1002 spi_set_ctldata(spi, NULL);
1005 if (spi->dev.of_node)
1011 static void s3c64xx_spi_cleanup(struct spi_device *spi)
1013 struct s3c64xx_spi_csinfo *cs = spi_get_ctldata(spi);
1016 if (spi->dev.of_node)
1019 spi_set_ctldata(spi, NULL);
1025 struct spi_controller *spi = sdd->host;
1032 dev_err(&spi->dev, "RX overrun\n");
1036 dev_err(&spi->dev, "RX underrun\n");
1040 dev_err(&spi->dev, "TX overrun\n");
1044 dev_err(&spi->dev, "TX underrun\n");
1113 if (of_property_read_u32(dev->of_node, "samsung,spi-src-clk", &temp)) {
1114 dev_warn(dev, "spi bus clock parent not specified, using clock at index 0 as parent\n");
1185 ret = of_alias_get_id(pdev->dev.of_node, "spi");
1213 /* the spi->mode bits understood by this driver: */
1231 sdd->clk = devm_clk_get_enabled(&pdev->dev, "spi");
1234 "Unable to acquire clock 'spi'\n");
1263 "spi-s3c64xx", sdd);
1490 .name = "s3c2443-spi",
1493 .name = "s3c6410-spi",
1500 { .compatible = "samsung,s3c2443-spi",
1503 { .compatible = "samsung,s3c6410-spi",
1506 { .compatible = "samsung,s5pv210-spi",
1509 { .compatible = "samsung,exynos4210-spi",
1512 { .compatible = "samsung,exynos7-spi",
1515 { .compatible = "samsung,exynos5433-spi",
1518 { .compatible = "samsung,exynosautov9-spi",
1521 { .compatible = "tesla,fsd-spi",
1530 .name = "s3c64xx-spi",
1538 MODULE_ALIAS("platform:s3c64xx-spi");