Lines Matching defs:spi
14 #include <linux/spi/spi.h>
18 #define DRIVER_NAME "rockchip-spi"
154 /* sclk_out: spi host internal logic in rk3x can support 50Mhz */
198 bool cs_inactive; /* spi target tansmition stop when cs inactive */
224 dev_warn(rs->dev, "spi controller is in busy state!\n");
242 static void rockchip_spi_set_cs(struct spi_device *spi, bool enable)
244 struct spi_controller *ctlr = spi->controller;
246 bool cs_asserted = spi->mode & SPI_CS_HIGH ? enable : !enable;
249 if (cs_asserted == rs->cs_asserted[spi_get_chipselect(spi, 0)])
256 if (spi_get_csgpiod(spi, 0))
260 BIT(spi_get_chipselect(spi, 0)));
262 if (spi_get_csgpiod(spi, 0))
266 BIT(spi_get_chipselect(spi, 0)));
272 rs->cs_asserted[spi_get_chipselect(spi, 0)] = cs_asserted;
280 /* stop running spi transfer
321 * level while spi is enabled, so instead make sure to leave
354 /* When int_cs_inactive comes, spi target abort */
504 /* rx must be started before tx due to spi instinct */
527 struct spi_device *spi, struct spi_transfer *xfer,
542 cr0 |= (spi->mode & 0x3U) << CR0_SCPH_OFFSET;
543 if (spi->mode & SPI_LSB_FIRST)
545 if (spi->mode & SPI_CS_HIGH)
546 cr0 |= BIT(spi_get_chipselect(spi, 0)) << CR0_SOI_OFFSET;
612 static size_t rockchip_spi_max_transfer_size(struct spi_device *spi)
670 struct spi_device *spi,
698 use_dma = ctlr->can_dma ? ctlr->can_dma(ctlr, spi, xfer) : false;
700 ret = rockchip_spi_config(rs, spi, xfer, use_dma, ctlr->target);
711 struct spi_device *spi,
717 /* if the numbor of spi words to transfer is less than the fifo
724 static int rockchip_spi_setup(struct spi_device *spi)
726 struct rockchip_spi *rs = spi_controller_get_devdata(spi->controller);
729 if (!spi_get_csgpiod(spi, 0) && (spi->mode & SPI_CS_HIGH) && !rs->cs_high_supported) {
730 dev_warn(&spi->dev, "setup: non GPIO CS can't be active-high\n");
739 cr0 |= ((spi->mode & 0x3) << CR0_SCPH_OFFSET);
740 if (spi->mode & SPI_CS_HIGH && spi_get_chipselect(spi, 0) <= 1)
741 cr0 |= BIT(spi_get_chipselect(spi, 0)) << CR0_SOI_OFFSET;
742 else if (spi_get_chipselect(spi, 0) <= 1)
743 cr0 &= ~(BIT(spi_get_chipselect(spi, 0)) << CR0_SOI_OFFSET);
762 target_mode = of_property_read_bool(np, "spi-slave");
1054 { .compatible = "rockchip,px30-spi", },
1055 { .compatible = "rockchip,rk3036-spi", },
1056 { .compatible = "rockchip,rk3066-spi", },
1057 { .compatible = "rockchip,rk3188-spi", },
1058 { .compatible = "rockchip,rk3228-spi", },
1059 { .compatible = "rockchip,rk3288-spi", },
1060 { .compatible = "rockchip,rk3308-spi", },
1061 { .compatible = "rockchip,rk3328-spi", },
1062 { .compatible = "rockchip,rk3368-spi", },
1063 { .compatible = "rockchip,rk3399-spi", },
1064 { .compatible = "rockchip,rv1108-spi", },
1065 { .compatible = "rockchip,rv1126-spi", },