Lines Matching defs:sfc
187 static int rockchip_sfc_reset(struct rockchip_sfc *sfc)
192 writel_relaxed(SFC_RCVR_RESET, sfc->regbase + SFC_RCVR);
194 err = readl_poll_timeout(sfc->regbase + SFC_RCVR, status,
198 dev_err(sfc->dev, "SFC reset never finished\n");
201 writel_relaxed(0xFFFFFFFF, sfc->regbase + SFC_ICLR);
203 dev_dbg(sfc->dev, "reset\n");
208 static u16 rockchip_sfc_get_version(struct rockchip_sfc *sfc)
210 return (u16)(readl(sfc->regbase + SFC_VER) & 0xffff);
213 static u32 rockchip_sfc_get_max_iosize(struct rockchip_sfc *sfc)
218 static void rockchip_sfc_irq_unmask(struct rockchip_sfc *sfc, u32 mask)
223 reg = readl(sfc->regbase + SFC_IMR);
225 writel(reg, sfc->regbase + SFC_IMR);
228 static void rockchip_sfc_irq_mask(struct rockchip_sfc *sfc, u32 mask)
233 reg = readl(sfc->regbase + SFC_IMR);
235 writel(reg, sfc->regbase + SFC_IMR);
238 static int rockchip_sfc_init(struct rockchip_sfc *sfc)
240 writel(0, sfc->regbase + SFC_CTRL);
241 writel(0xFFFFFFFF, sfc->regbase + SFC_ICLR);
242 rockchip_sfc_irq_mask(sfc, 0xFFFFFFFF);
243 if (rockchip_sfc_get_version(sfc) >= SFC_VER_4)
244 writel(SFC_LEN_CTRL_TRB_SEL, sfc->regbase + SFC_LEN_CTRL);
249 static int rockchip_sfc_wait_txfifo_ready(struct rockchip_sfc *sfc, u32 timeout_us)
254 ret = readl_poll_timeout(sfc->regbase + SFC_FSR, status,
258 dev_dbg(sfc->dev, "sfc wait tx fifo timeout\n");
266 static int rockchip_sfc_wait_rxfifo_ready(struct rockchip_sfc *sfc, u32 timeout_us)
271 ret = readl_poll_timeout(sfc->regbase + SFC_FSR, status,
275 dev_dbg(sfc->dev, "sfc wait rx fifo timeout\n");
298 static int rockchip_sfc_xfer_setup(struct rockchip_sfc *sfc,
317 writel(op->addr.nbytes * 8 - 1, sfc->regbase + SFC_ABIT);
334 if (sfc->version >= SFC_VER_4) /* Clear it if no data to transfer */
335 writel(len, sfc->regbase + SFC_LEN_EXT);
351 dev_dbg(sfc->dev, "sfc addr.nbytes=%x(x%d) dummy.nbytes=%x(x%d)\n",
354 dev_dbg(sfc->dev, "sfc ctrl=%x cmd=%x addr=%llx len=%x\n",
357 writel(ctrl, sfc->regbase + SFC_CTRL);
358 writel(cmd, sfc->regbase + SFC_CMD);
360 writel(op->addr.val, sfc->regbase + SFC_ADDR);
365 static int rockchip_sfc_write_fifo(struct rockchip_sfc *sfc, const u8 *buf, int len)
375 tx_level = rockchip_sfc_wait_txfifo_ready(sfc, 1000);
379 iowrite32_rep(sfc->regbase + SFC_DATA, buf, write_words);
386 tx_level = rockchip_sfc_wait_txfifo_ready(sfc, 1000);
390 writel(tmp, sfc->regbase + SFC_DATA);
396 static int rockchip_sfc_read_fifo(struct rockchip_sfc *sfc, u8 *buf, int len)
407 rx_level = rockchip_sfc_wait_rxfifo_ready(sfc, 1000);
411 ioread32_rep(sfc->regbase + SFC_DATA, buf, read_words);
418 rx_level = rockchip_sfc_wait_rxfifo_ready(sfc, 1000);
421 tmp = readl(sfc->regbase + SFC_DATA);
428 static int rockchip_sfc_fifo_transfer_dma(struct rockchip_sfc *sfc, dma_addr_t dma_buf, size_t len)
430 writel(0xFFFFFFFF, sfc->regbase + SFC_ICLR);
431 writel((u32)dma_buf, sfc->regbase + SFC_DMA_ADDR);
432 writel(SFC_DMA_TRIGGER_START, sfc->regbase + SFC_DMA_TRIGGER);
437 static int rockchip_sfc_xfer_data_poll(struct rockchip_sfc *sfc,
440 dev_dbg(sfc->dev, "sfc xfer_poll len=%x\n", len);
443 return rockchip_sfc_write_fifo(sfc, op->data.buf.out, len);
445 return rockchip_sfc_read_fifo(sfc, op->data.buf.in, len);
448 static int rockchip_sfc_xfer_data_dma(struct rockchip_sfc *sfc,
453 dev_dbg(sfc->dev, "sfc xfer_dma len=%x\n", len);
456 memcpy(sfc->buffer, op->data.buf.out, len);
458 ret = rockchip_sfc_fifo_transfer_dma(sfc, sfc->dma_buffer, len);
459 if (!wait_for_completion_timeout(&sfc->cp, msecs_to_jiffies(2000))) {
460 dev_err(sfc->dev, "DMA wait for transfer finish timeout\n");
463 rockchip_sfc_irq_mask(sfc, SFC_IMR_DMA);
465 memcpy(op->data.buf.in, sfc->buffer, len);
470 static int rockchip_sfc_xfer_done(struct rockchip_sfc *sfc, u32 timeout_us)
475 ret = readl_poll_timeout(sfc->regbase + SFC_SR, status,
479 dev_err(sfc->dev, "wait sfc idle timeout\n");
480 rockchip_sfc_reset(sfc);
490 struct rockchip_sfc *sfc = spi_controller_get_devdata(mem->spi->controller);
494 if (unlikely(mem->spi->max_speed_hz != sfc->frequency)) {
495 ret = clk_set_rate(sfc->clk, mem->spi->max_speed_hz);
498 sfc->frequency = mem->spi->max_speed_hz;
499 dev_dbg(sfc->dev, "set_freq=%dHz real_freq=%ldHz\n",
500 sfc->frequency, clk_get_rate(sfc->clk));
504 rockchip_sfc_xfer_setup(sfc, mem, op, len);
506 if (likely(sfc->use_dma) && len >= SFC_DMA_TRANS_THRETHOLD) {
507 init_completion(&sfc->cp);
508 rockchip_sfc_irq_unmask(sfc, SFC_IMR_DMA);
509 ret = rockchip_sfc_xfer_data_dma(sfc, op, len);
511 ret = rockchip_sfc_xfer_data_poll(sfc, op, len);
515 dev_err(sfc->dev, "xfer data failed ret %d dir %d\n", ret, op->data.dir);
521 return rockchip_sfc_xfer_done(sfc, 100000);
526 struct rockchip_sfc *sfc = spi_controller_get_devdata(mem->spi->controller);
528 op->data.nbytes = min(op->data.nbytes, sfc->max_iosize);
540 struct rockchip_sfc *sfc = dev_id;
543 reg = readl(sfc->regbase + SFC_RISR);
546 writel_relaxed(reg, sfc->regbase + SFC_ICLR);
549 complete(&sfc->cp);
561 struct rockchip_sfc *sfc;
564 host = devm_spi_alloc_host(&pdev->dev, sizeof(*sfc));
575 sfc = spi_controller_get_devdata(host);
576 sfc->dev = dev;
578 sfc->regbase = devm_platform_ioremap_resource(pdev, 0);
579 if (IS_ERR(sfc->regbase))
580 return PTR_ERR(sfc->regbase);
582 sfc->clk = devm_clk_get(&pdev->dev, "clk_sfc");
583 if (IS_ERR(sfc->clk)) {
584 dev_err(&pdev->dev, "Failed to get sfc interface clk\n");
585 return PTR_ERR(sfc->clk);
588 sfc->hclk = devm_clk_get(&pdev->dev, "hclk_sfc");
589 if (IS_ERR(sfc->hclk)) {
590 dev_err(&pdev->dev, "Failed to get sfc ahb clk\n");
591 return PTR_ERR(sfc->hclk);
594 sfc->use_dma = !of_property_read_bool(sfc->dev->of_node,
595 "rockchip,sfc-no-dma");
597 if (sfc->use_dma) {
604 sfc->buffer = dmam_alloc_coherent(dev, SFC_MAX_IOSIZE_VER3,
605 &sfc->dma_buffer,
607 if (!sfc->buffer)
611 ret = clk_prepare_enable(sfc->hclk);
617 ret = clk_prepare_enable(sfc->clk);
629 0, pdev->name, sfc);
636 ret = rockchip_sfc_init(sfc);
640 sfc->max_iosize = rockchip_sfc_get_max_iosize(sfc);
641 sfc->version = rockchip_sfc_get_version(sfc);
650 clk_disable_unprepare(sfc->clk);
652 clk_disable_unprepare(sfc->hclk);
660 struct rockchip_sfc *sfc = platform_get_drvdata(pdev);
664 clk_disable_unprepare(sfc->clk);
665 clk_disable_unprepare(sfc->hclk);
669 { .compatible = "rockchip,sfc"},
676 .name = "rockchip-sfc",