Lines Matching defs:drv_data

20 static void pxa2xx_spi_dma_transfer_complete(struct driver_data *drv_data,
23 struct spi_message *msg = drv_data->controller->cur_msg;
31 if (atomic_dec_and_test(&drv_data->dma_running)) {
38 error = read_SSSR_bits(drv_data, drv_data->mask_sr) & SSSR_ROR;
41 clear_SSCR1_bits(drv_data, drv_data->dma_cr1);
42 write_SSSR_CS(drv_data, drv_data->clear_sr);
43 if (!pxa25x_ssp_comp(drv_data))
44 pxa2xx_spi_write(drv_data, SSTO, 0);
48 pxa_ssp_disable(drv_data->ssp);
52 spi_finalize_current_transfer(drv_data->controller);
62 pxa2xx_spi_dma_prepare_one(struct driver_data *drv_data,
67 spi_get_ctldata(drv_data->controller->cur_msg->spi);
74 switch (drv_data->n_bytes) {
90 cfg.dst_addr = drv_data->ssp->phys_base + SSDR;
95 chan = drv_data->controller->dma_tx;
97 cfg.src_addr = drv_data->ssp->phys_base + SSDR;
102 chan = drv_data->controller->dma_rx;
107 dev_warn(drv_data->ssp->dev, "DMA slave config failed\n");
115 irqreturn_t pxa2xx_spi_dma_transfer(struct driver_data *drv_data)
119 status = read_SSSR_bits(drv_data, drv_data->mask_sr);
121 dev_err(drv_data->ssp->dev, "FIFO overrun\n");
123 dmaengine_terminate_async(drv_data->controller->dma_rx);
124 dmaengine_terminate_async(drv_data->controller->dma_tx);
126 pxa2xx_spi_dma_transfer_complete(drv_data, true);
133 int pxa2xx_spi_dma_prepare(struct driver_data *drv_data,
139 tx_desc = pxa2xx_spi_dma_prepare_one(drv_data, DMA_MEM_TO_DEV, xfer);
141 dev_err(drv_data->ssp->dev, "failed to get DMA TX descriptor\n");
146 rx_desc = pxa2xx_spi_dma_prepare_one(drv_data, DMA_DEV_TO_MEM, xfer);
148 dev_err(drv_data->ssp->dev, "failed to get DMA RX descriptor\n");
155 rx_desc->callback_param = drv_data;
162 dmaengine_terminate_async(drv_data->controller->dma_tx);
167 void pxa2xx_spi_dma_start(struct driver_data *drv_data)
169 dma_async_issue_pending(drv_data->controller->dma_rx);
170 dma_async_issue_pending(drv_data->controller->dma_tx);
172 atomic_set(&drv_data->dma_running, 1);
175 void pxa2xx_spi_dma_stop(struct driver_data *drv_data)
177 atomic_set(&drv_data->dma_running, 0);
178 dmaengine_terminate_sync(drv_data->controller->dma_rx);
179 dmaengine_terminate_sync(drv_data->controller->dma_tx);
182 int pxa2xx_spi_dma_setup(struct driver_data *drv_data)
184 struct pxa2xx_spi_controller *pdata = drv_data->controller_info;
185 struct spi_controller *controller = drv_data->controller;
186 struct device *dev = drv_data->ssp->dev;
208 void pxa2xx_spi_dma_release(struct driver_data *drv_data)
210 struct spi_controller *controller = drv_data->controller;
230 struct driver_data *drv_data = spi_controller_get_devdata(spi->controller);
231 u32 dma_burst_size = drv_data->controller_info->dma_burst_size;