Lines Matching refs:bs

122 #define bcm63xx_prepend_printk_on_checkfail(bs, fmt, ...)	\
124 if (bs->xfer_mode == HSSPI_XFER_MODE_AUTO) \
125 dev_dbg(&bs->pdev->dev, fmt, ##__VA_ARGS__); \
126 else if (bs->xfer_mode == HSSPI_XFER_MODE_PREPEND) \
127 dev_err(&bs->pdev->dev, fmt, ##__VA_ARGS__); \
152 struct bcm63xx_hsspi *bs = spi_controller_get_devdata(ctrl);
154 return sprintf(buf, "%d\n", bs->wait_mode);
161 struct bcm63xx_hsspi *bs = spi_controller_get_devdata(ctrl);
172 mutex_lock(&bs->msg_mutex);
173 bs->wait_mode = val;
176 __raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);
177 mutex_unlock(&bs->msg_mutex);
188 struct bcm63xx_hsspi *bs = spi_controller_get_devdata(ctrl);
190 return sprintf(buf, "%d\n", bs->xfer_mode);
197 struct bcm63xx_hsspi *bs = spi_controller_get_devdata(ctrl);
208 mutex_lock(&bs->msg_mutex);
209 bs->xfer_mode = val;
210 mutex_unlock(&bs->msg_mutex);
227 static void bcm63xx_hsspi_set_clk(struct bcm63xx_hsspi *bs,
235 static int bcm63xx_hsspi_wait_cmd(struct bcm63xx_hsspi *bs)
241 if (bs->wait_mode == HSSPI_WAIT_MODE_INTR) {
242 if (wait_for_completion_timeout(&bs->done, HZ) == 0)
249 reg = __raw_readl(bs->regs + HSSPI_PINGPONG_STATUS_REG(0));
260 dev_err(&bs->pdev->dev, "transfer timed out!\n");
270 struct bcm63xx_hsspi *bs = spi_controller_get_devdata(host);
282 bs->prepend_cnt = 0;
285 bcm63xx_prepend_printk_on_checkfail(bs,
293 if (bs->prepend_cnt + t->len >
295 bcm63xx_prepend_printk_on_checkfail(bs,
302 bcm63xx_prepend_printk_on_checkfail(bs,
308 memcpy(bs->prepend_buf + bs->prepend_cnt, t->tx_buf, t->len);
309 bs->prepend_cnt += t->len;
313 bcm63xx_prepend_printk_on_checkfail(bs,
327 t_prepend->len = bs->prepend_cnt;
328 t_prepend->tx_buf = bs->prepend_buf;
329 bs->prepend_cnt = 0;
336 if (bs->prepend_cnt > HSSPI_MAX_PREPEND_LEN) {
337 bcm63xx_prepend_printk_on_checkfail(bs,
351 struct bcm63xx_hsspi *bs = spi_controller_get_devdata(spi->controller);
362 if (t->len + bs->prepend_cnt > (HSSPI_BUFFER_LEN - HSSPI_OPCODE_LEN)) {
363 dev_warn(&bs->pdev->dev,
365 t->len, bs->prepend_cnt);
369 bcm63xx_hsspi_set_clk(bs, spi, t->speed_hz);
384 reg |= bs->prepend_cnt << MODE_CTRL_MULTIDATA_RD_STRT_SHIFT;
388 reg |= bs->prepend_cnt << MODE_CTRL_MULTIDATA_WR_STRT_SHIFT;
392 reg |= bs->prepend_cnt << MODE_CTRL_PREPENDBYTE_CNT_SHIFT;
394 bs->regs + HSSPI_PROFILE_MODE_CTRL_REG(chip_select));
396 reinit_completion(&bs->done);
397 if (bs->prepend_cnt)
398 memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, bs->prepend_buf,
399 bs->prepend_cnt);
401 memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN + bs->prepend_cnt, tx,
405 __raw_writew(val, bs->fifo);
407 if (bs->wait_mode == HSSPI_WAIT_MODE_INTR)
408 __raw_writel(HSSPI_PINGx_CMD_DONE(0), bs->regs + HSSPI_INT_MASK_REG);
414 __raw_writel(reg, bs->regs + HSSPI_PINGPONG_COMMAND_REG(0));
416 if (bcm63xx_hsspi_wait_cmd(bs))
420 memcpy_fromio(rx, bs->fifo, t->len);
425 static void bcm63xx_hsspi_set_cs(struct bcm63xx_hsspi *bs, unsigned int cs,
430 mutex_lock(&bs->bus_mutex);
431 reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
434 if (active == !(bs->cs_polarity & BIT(cs)))
437 __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
438 mutex_unlock(&bs->bus_mutex);
441 static void bcm63xx_hsspi_set_clk(struct bcm63xx_hsspi *bs,
447 reg = DIV_ROUND_UP(2048, DIV_ROUND_UP(bs->speed_hz, hz));
449 bs->regs + HSSPI_PROFILE_CLK_CTRL_REG(profile));
451 reg = __raw_readl(bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));
456 __raw_writel(reg, bs->regs + HSSPI_PROFILE_SIGNAL_CTRL_REG(profile));
458 mutex_lock(&bs->bus_mutex);
460 reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
464 __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
465 mutex_unlock(&bs->bus_mutex);
470 struct bcm63xx_hsspi *bs = spi_controller_get_devdata(spi->controller);
479 bcm63xx_hsspi_set_clk(bs, spi, t->speed_hz);
481 bcm63xx_hsspi_set_cs(bs, spi_get_chipselect(spi, 0), true);
504 bs->regs + HSSPI_PROFILE_MODE_CTRL_REG(chip_select));
509 reinit_completion(&bs->done);
511 memcpy_toio(bs->fifo + HSSPI_OPCODE_LEN, tx, curr_step);
516 __raw_writew(val, bs->fifo);
519 if (bs->wait_mode == HSSPI_WAIT_MODE_INTR)
521 bs->regs + HSSPI_INT_MASK_REG);
526 __raw_writel(reg, bs->regs + HSSPI_PINGPONG_COMMAND_REG(0));
528 if (bcm63xx_hsspi_wait_cmd(bs))
532 memcpy_fromio(rx, bs->fifo, curr_step);
544 struct bcm63xx_hsspi *bs = spi_controller_get_devdata(spi->controller);
547 reg = __raw_readl(bs->regs +
554 __raw_writel(reg, bs->regs +
557 mutex_lock(&bs->bus_mutex);
558 reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
561 if ((reg & GLOBAL_CTRL_CS_POLARITY_MASK) == bs->cs_polarity) {
566 __raw_writel(reg, bs->regs + HSSPI_GLOBAL_CTRL_REG);
570 bs->cs_polarity |= BIT(spi_get_chipselect(spi, 0));
572 bs->cs_polarity &= ~BIT(spi_get_chipselect(spi, 0));
574 mutex_unlock(&bs->bus_mutex);
582 struct bcm63xx_hsspi *bs = spi_controller_get_devdata(spi->controller);
604 bcm63xx_hsspi_set_cs(bs, dummy_cs, true);
613 if (bs->xfer_mode == HSSPI_XFER_MODE_AUTO) {
616 dev_warn_once(&bs->pdev->dev,
636 bcm63xx_hsspi_set_cs(bs, spi_get_chipselect(spi, 0), false);
641 bcm63xx_hsspi_set_cs(bs, spi_get_chipselect(spi, 0), true);
645 bcm63xx_hsspi_set_cs(bs, spi_get_chipselect(spi, 0), t->cs_off);
649 bcm63xx_hsspi_set_cs(bs, dummy_cs, false);
651 bcm63xx_hsspi_set_cs(bs, spi_get_chipselect(spi, 0), false);
659 struct bcm63xx_hsspi *bs = spi_controller_get_devdata(host);
665 mutex_lock(&bs->msg_mutex);
667 if (bs->xfer_mode != HSSPI_XFER_MODE_DUMMYCS)
672 msg->actual_length = (t_prepend.len + bs->prepend_cnt);
674 if (bs->xfer_mode == HSSPI_XFER_MODE_PREPEND) {
675 dev_err(&bs->pdev->dev,
682 mutex_unlock(&bs->msg_mutex);
711 struct bcm63xx_hsspi *bs = (struct bcm63xx_hsspi *)dev_id;
713 if (__raw_readl(bs->regs + HSSPI_INT_STATUS_MASKED_REG) == 0)
716 __raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);
717 __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
719 complete(&bs->done);
727 struct bcm63xx_hsspi *bs;
782 host = spi_alloc_host(&pdev->dev, sizeof(*bs));
788 bs = spi_controller_get_devdata(host);
789 bs->pdev = pdev;
790 bs->clk = clk;
791 bs->pll_clk = pll_clk;
792 bs->regs = regs;
793 bs->speed_hz = rate;
794 bs->fifo = (u8 __iomem *)(bs->regs + HSSPI_FIFO_REG(0));
795 bs->wait_mode = HSSPI_WAIT_MODE_POLLING;
796 bs->prepend_buf = devm_kzalloc(dev, HSSPI_BUFFER_LEN, GFP_KERNEL);
797 if (!bs->prepend_buf) {
802 mutex_init(&bs->bus_mutex);
803 mutex_init(&bs->msg_mutex);
804 init_completion(&bs->done);
831 __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
834 __raw_writel(HSSPI_INT_CLEAR_ALL, bs->regs + HSSPI_INT_STATUS_REG);
837 reg = __raw_readl(bs->regs + HSSPI_GLOBAL_CTRL_REG);
838 bs->cs_polarity = reg & GLOBAL_CTRL_CS_POLARITY_MASK;
840 bs->regs + HSSPI_GLOBAL_CTRL_REG);
844 pdev->name, bs);
884 struct bcm63xx_hsspi *bs = spi_controller_get_devdata(host);
887 __raw_writel(0, bs->regs + HSSPI_INT_MASK_REG);
888 clk_disable_unprepare(bs->pll_clk);
889 clk_disable_unprepare(bs->clk);
897 struct bcm63xx_hsspi *bs = spi_controller_get_devdata(host);
900 clk_disable_unprepare(bs->pll_clk);
901 clk_disable_unprepare(bs->clk);
909 struct bcm63xx_hsspi *bs = spi_controller_get_devdata(host);
912 ret = clk_prepare_enable(bs->clk);
916 if (bs->pll_clk) {
917 ret = clk_prepare_enable(bs->pll_clk);
919 clk_disable_unprepare(bs->clk);