Lines Matching defs:BSPI
30 /* BSPI register offsets */
192 BSPI,
316 /* BSPI helpers */
323 if (!(bcm_qspi_read(qspi, BSPI, BSPI_BUSY_STATUS) & 1))
342 bcm_qspi_write(qspi, BSPI, BSPI_B0_CTRL, 1);
343 bcm_qspi_write(qspi, BSPI, BSPI_B1_CTRL, 1);
344 bcm_qspi_write(qspi, BSPI, BSPI_B0_CTRL, 0);
345 bcm_qspi_write(qspi, BSPI, BSPI_B1_CTRL, 0);
350 return (bcm_qspi_read(qspi, BSPI, BSPI_RAF_STATUS) &
356 u32 data = bcm_qspi_read(qspi, BSPI, BSPI_RAF_READ_DATA);
358 /* BSPI v3 LR is LE only, convert data to host endianness */
368 bcm_qspi_write(qspi, BSPI, BSPI_RAF_CTRL,
374 bcm_qspi_write(qspi, BSPI, BSPI_RAF_CTRL,
409 bcm_qspi_write(qspi, BSPI, BSPI_FLEX_MODE_ENABLE, 0);
410 bcm_qspi_write(qspi, BSPI, BSPI_BITS_PER_CYCLE, bpc);
411 bcm_qspi_write(qspi, BSPI, BSPI_BITS_PER_PHASE, bpp);
412 bcm_qspi_write(qspi, BSPI, BSPI_CMD_AND_MODE_BYTE, cmd_byte);
413 bcm_qspi_write(qspi, BSPI, BSPI_FLEX_MODE_ENABLE, flex_mode);
468 u32 data = bcm_qspi_read(qspi, BSPI, BSPI_STRAP_OVERRIDE_CTRL);
502 bcm_qspi_write(qspi, BSPI, BSPI_STRAP_OVERRIDE_CTRL, data);
521 val = bcm_qspi_read(qspi, BSPI, BSPI_STRAP_OVERRIDE_CTRL);
525 bcm_qspi_write(qspi, BSPI, BSPI_FLEX_MODE_ENABLE, 0);
560 if ((bcm_qspi_read(qspi, BSPI, BSPI_MAST_N_BOOT_CTRL) & 1) == 0)
565 bcm_qspi_write(qspi, BSPI, BSPI_MAST_N_BOOT_CTRL, 0);
575 if ((bcm_qspi_read(qspi, BSPI, BSPI_MAST_N_BOOT_CTRL) & 1))
579 bcm_qspi_write(qspi, BSPI, BSPI_MAST_N_BOOT_CTRL, 1);
1059 bcm_qspi_write(qspi, BSPI,
1092 bcm_qspi_write(qspi, BSPI, BSPI_RAF_START_ADDR, addr);
1093 bcm_qspi_write(qspi, BSPI, BSPI_RAF_NUM_WORDS, len_words);
1094 bcm_qspi_write(qspi, BSPI, BSPI_RAF_WATERMARK, 0);
1097 * clear soc MSPI and BSPI interrupts and enable
1098 * BSPI interrupts.
1104 /* Must flush previous writes before starting BSPI operation */
1108 dev_err(&qspi->pdev->dev, "timeout waiting for BSPI\n");
1211 * But for BSPI <= V3, we need to convert it to a remapped BSPI
1277 /* disable soc BSPI interrupt */
1291 /* clear soc BSPI interrupt */
1308 dev_err(&qspi->pdev->dev, "BSPI INT error\n");
1391 val = bcm_qspi_read(qspi, BSPI, BSPI_REVISION_ID);
1395 /* Force mapping of BSPI address -> flash offset */
1396 bcm_qspi_write(qspi, BSPI, BSPI_BSPI_XOR_VALUE, 0);
1397 bcm_qspi_write(qspi, BSPI, BSPI_BSPI_XOR_ENABLE, 1);
1401 bcm_qspi_write(qspi, BSPI, BSPI_B0_CTRL, 0);
1402 bcm_qspi_write(qspi, BSPI, BSPI_B1_CTRL, 0);
1552 qspi->base[BSPI] = devm_ioremap_resource(dev, res);
1553 if (IS_ERR(qspi->base[BSPI]))
1554 return PTR_ERR(qspi->base[BSPI]);
1701 bcm_qspi_read(qspi, BSPI, BSPI_STRAP_OVERRIDE_CTRL);