Lines Matching refs:as
308 * This message can be anything as it should not be treated by any SPI device.
320 static bool atmel_spi_is_v2(struct atmel_spi *as)
322 return as->caps.is_spi2;
331 static void atmel_spi_send_dummy(struct atmel_spi *as, struct spi_device *spi, int chip_select)
341 csr = spi_readl(as, CSR0 + 4 * chip_select);
343 spi_writel(as, CSR0 + 4 * chip_select, csr);
349 spi_readl(as, RDR);
350 while (spi_readl(as, SR) & SPI_BIT(RDRF)) {
351 spi_readl(as, RDR);
355 spi_writel(as, TDR, DUMMY_MSG);
357 readl_poll_timeout_atomic(as->regs + SPI_SR, status,
366 * transmitted") Not so! Workaround uses nCSx pins as GPIOs; or newer
369 * Even controller newer than ar91rm9200, using GPIOs can make sens as
381 * using a GPIO as Chip Select: the clock level is applied only when the first
385 static void cs_activate(struct atmel_spi *as, struct spi_device *spi)
393 chip_select = as->native_cs_for_gpio;
397 if (atmel_spi_is_v2(as)) {
398 spi_writel(as, CSR0 + 4 * chip_select, asd->csr);
400 * on CS1,2,3 needs SPI_CSR0.BITS config as SPI_CSR1,2,3.BITS
402 spi_writel(as, CSR0, asd->csr);
403 if (as->caps.has_wdrbt) {
404 spi_writel(as, MR,
410 spi_writel(as, MR,
416 mr = spi_readl(as, MR);
425 if (new_polarity != as->last_polarity) {
431 atmel_spi_send_dummy(as, spi, chip_select);
432 as->last_polarity = new_polarity;
443 csr = spi_readl(as, CSR0 + 4 * i);
445 spi_writel(as, CSR0 + 4 * i,
449 mr = spi_readl(as, MR);
451 spi_writel(as, MR, mr);
457 static void cs_deactivate(struct atmel_spi *as, struct spi_device *spi)
463 chip_select = as->native_cs_for_gpio;
470 mr = spi_readl(as, MR);
473 spi_writel(as, MR, mr);
479 spi_writel(as, CR, SPI_BIT(LASTXFER));
482 static void atmel_spi_lock(struct atmel_spi *as) __acquires(&as->lock)
484 spin_lock_irqsave(&as->lock, as->flags);
487 static void atmel_spi_unlock(struct atmel_spi *as) __releases(&as->lock)
489 spin_unlock_irqrestore(&as->lock, as->flags);
497 static inline bool atmel_spi_use_dma(struct atmel_spi *as,
500 return as->use_dma && xfer->len >= DMA_MIN_BYTES;
507 struct atmel_spi *as = spi_controller_get_devdata(host);
510 return atmel_spi_use_dma(as, xfer) &&
513 return atmel_spi_use_dma(as, xfer);
517 static int atmel_spi_dma_slave_config(struct atmel_spi *as, u8 bits_per_word)
519 struct spi_controller *host = platform_get_drvdata(as->pdev);
531 slave_config.dst_addr = (dma_addr_t)as->phybase + SPI_TDR;
532 slave_config.src_addr = (dma_addr_t)as->phybase + SPI_RDR;
552 dev_err(&as->pdev->dev,
566 dev_err(&as->pdev->dev,
575 struct atmel_spi *as)
577 struct device *dev = &as->pdev->dev;
598 err = atmel_spi_dma_slave_config(as, 8);
602 dev_info(&as->pdev->dev,
642 struct atmel_spi *as = spi_controller_get_devdata(host);
644 if (is_vmalloc_addr(as->current_transfer->rx_buf) &&
646 memcpy(as->current_transfer->rx_buf, as->addr_rx_bbuf,
647 as->current_transfer->len);
649 complete(&as->xfer_completion);
658 struct atmel_spi *as = spi_controller_get_devdata(host);
659 unsigned long xfer_pos = xfer->len - as->current_remaining_bytes;
664 spi_readl(as, RDR);
665 while (spi_readl(as, SR) & SPI_BIT(RDRF)) {
666 spi_readl(as, RDR);
671 spi_writel(as, TDR, *(u16 *)(xfer->tx_buf + xfer_pos));
673 spi_writel(as, TDR, *(u8 *)(xfer->tx_buf + xfer_pos));
681 spi_writel(as, IER, SPI_BIT(RDRF) | SPI_BIT(OVRES));
690 struct atmel_spi *as = spi_controller_get_devdata(host);
692 u32 offset = xfer->len - as->current_remaining_bytes;
702 ((u32)as->current_remaining_bytes >> 1) :
703 (u32)as->current_remaining_bytes);
704 num_data = min(current_remaining_data, as->fifo_size);
707 spi_writel(as, CR, SPI_BIT(RXFCLR) | SPI_BIT(TXFCLR));
708 while (spi_readl(as, FLR))
712 fifomr = spi_readl(as, FMR);
713 spi_writel(as, FMR, SPI_BFINS(RXFTHRES, num_data, fifomr));
716 (void)spi_readl(as, SR);
728 spi_writel(as, TDR, (td1 << 16) | td0);
738 spi_writew(as, TDR, td0);
751 spi_writel(as, IER, SPI_BIT(RXFTHF) | SPI_BIT(OVRES));
760 struct atmel_spi *as = spi_controller_get_devdata(host);
762 if (as->fifo_size)
775 struct atmel_spi *as = spi_controller_get_devdata(host);
791 if (atmel_spi_dma_slave_config(as, xfer->bits_per_word))
798 as->dma_addr_rx_bbuf,
816 memcpy(as->addr_tx_bbuf, xfer->tx_buf, xfer->len);
818 as->dma_addr_tx_bbuf,
839 spi_writel(as, IER, SPI_BIT(OVRES));
858 spi_writel(as, IDR, SPI_BIT(OVRES));
876 static int atmel_spi_set_xfer_speed(struct atmel_spi *as,
885 chip_select = as->native_cs_for_gpio;
890 bus_hz = as->spi_clk;
891 if (!atmel_spi_is_v2(as))
916 csr = spi_readl(as, CSR0 + 4 * chip_select);
918 spi_writel(as, CSR0 + 4 * chip_select, csr);
931 struct atmel_spi *as = spi_controller_get_devdata(host);
935 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
937 len = as->current_remaining_bytes;
939 as->current_remaining_bytes -= len;
941 spi_writel(as, RPR, rx_dma);
942 spi_writel(as, TPR, tx_dma);
946 spi_writel(as, RCR, len);
947 spi_writel(as, TCR, len);
955 if (as->current_remaining_bytes) {
956 len = as->current_remaining_bytes;
958 as->current_remaining_bytes -= len;
960 spi_writel(as, RNPR, rx_dma);
961 spi_writel(as, TNPR, tx_dma);
965 spi_writel(as, RNCR, len);
966 spi_writel(as, TNCR, len);
985 spi_writel(as, IER, SPI_BIT(RXBUFF) | SPI_BIT(OVRES));
986 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
990 * For DMA, tx_buf/tx_dma have the same relationship as rx_buf/rx_dma:
997 atmel_spi_dma_map_xfer(struct atmel_spi *as, struct spi_transfer *xfer)
999 struct device *dev = &as->pdev->dev;
1039 static void atmel_spi_disable_pdc_transfer(struct atmel_spi *as)
1041 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
1045 atmel_spi_pump_single_data(struct atmel_spi *as, struct spi_transfer *xfer)
1049 unsigned long xfer_pos = xfer->len - as->current_remaining_bytes;
1053 *rxp16 = spi_readl(as, RDR);
1056 *rxp = spi_readl(as, RDR);
1059 if (as->current_remaining_bytes > 2)
1060 as->current_remaining_bytes -= 2;
1062 as->current_remaining_bytes = 0;
1064 as->current_remaining_bytes--;
1069 atmel_spi_pump_fifo_data(struct atmel_spi *as, struct spi_transfer *xfer)
1071 u32 fifolr = spi_readl(as, FLR);
1073 u32 offset = xfer->len - as->current_remaining_bytes;
1083 if (as->current_remaining_bytes > num_bytes)
1084 as->current_remaining_bytes -= num_bytes;
1086 as->current_remaining_bytes = 0;
1090 as->current_remaining_bytes &= ~0x1;
1094 rd = spi_readl(as, RDR);
1109 atmel_spi_pump_pio_data(struct atmel_spi *as, struct spi_transfer *xfer)
1111 if (as->fifo_size)
1112 atmel_spi_pump_fifo_data(as, xfer);
1114 atmel_spi_pump_single_data(as, xfer);
1124 struct atmel_spi *as = spi_controller_get_devdata(host);
1129 imr = spi_readl(as, IMR);
1130 status = spi_readl(as, SR);
1135 spi_writel(as, IDR, SPI_BIT(OVRES));
1147 as->done_status = -EIO;
1151 spi_readl(as, SR);
1153 complete(&as->xfer_completion);
1156 atmel_spi_lock(as);
1158 if (as->current_remaining_bytes) {
1160 xfer = as->current_transfer;
1161 atmel_spi_pump_pio_data(as, xfer);
1162 if (!as->current_remaining_bytes)
1163 spi_writel(as, IDR, pending);
1165 complete(&as->xfer_completion);
1168 atmel_spi_unlock(as);
1172 spi_writel(as, IDR, pending);
1182 struct atmel_spi *as = spi_controller_get_devdata(host);
1186 imr = spi_readl(as, IMR);
1187 status = spi_readl(as, SR);
1194 spi_writel(as, IDR, (SPI_BIT(RXBUFF) | SPI_BIT(ENDRX)
1198 spi_readl(as, SR);
1200 as->done_status = -EIO;
1202 complete(&as->xfer_completion);
1207 spi_writel(as, IDR, pending);
1209 complete(&as->xfer_completion);
1215 static int atmel_word_delay_csr(struct spi_device *spi, struct atmel_spi *as)
1230 return (as->spi_clk / 1000000 * value) >> 5;
1233 static void initialize_native_cs_for_gpio(struct atmel_spi *as)
1236 struct spi_controller *host = platform_get_drvdata(as->pdev);
1238 if (!as->native_cs_free)
1248 if (atmel_spi_is_v2(as))
1255 as->native_cs_free |= BIT(i);
1257 if (as->native_cs_free)
1258 as->native_cs_for_gpio = ffs(as->native_cs_free);
1263 struct atmel_spi *as;
1270 as = spi_controller_get_devdata(spi->controller);
1283 initialize_native_cs_for_gpio(as);
1285 if (spi_get_csgpiod(spi, 0) && as->native_cs_free) {
1292 chip_select = as->native_cs_for_gpio;
1306 word_delay_csr = atmel_word_delay_csr(spi, as);
1330 if (!atmel_spi_is_v2(as))
1331 spi_writel(as, CSR0 + 4 * chip_select, csr);
1338 struct atmel_spi *as = spi_controller_get_devdata(spi->controller);
1346 cs_activate(as, spi);
1348 cs_deactivate(as, spi);
1357 struct atmel_spi *as;
1366 as = spi_controller_get_devdata(host);
1381 && as->use_pdc) {
1382 if (atmel_spi_dma_map_xfer(as, xfer) < 0)
1386 atmel_spi_set_xfer_speed(as, spi, xfer);
1388 as->done_status = 0;
1389 as->current_transfer = xfer;
1390 as->current_remaining_bytes = xfer->len;
1391 while (as->current_remaining_bytes) {
1392 reinit_completion(&as->xfer_completion);
1394 if (as->use_pdc) {
1395 atmel_spi_lock(as);
1397 atmel_spi_unlock(as);
1398 } else if (atmel_spi_use_dma(as, xfer)) {
1399 len = as->current_remaining_bytes;
1405 as->done_status = ret;
1408 as->current_remaining_bytes -= len;
1409 if (as->current_remaining_bytes < 0)
1410 as->current_remaining_bytes = 0;
1413 atmel_spi_lock(as);
1415 atmel_spi_unlock(as);
1419 ret_timeout = wait_for_completion_timeout(&as->xfer_completion, dma_timeout);
1422 as->done_status = -EIO;
1425 if (as->done_status)
1429 if (as->done_status) {
1430 if (as->use_pdc) {
1433 spi_readl(as, TCR), spi_readl(as, RCR));
1439 spi_writel(as, RNCR, 0);
1440 spi_writel(as, TNCR, 0);
1441 spi_writel(as, RCR, 0);
1442 spi_writel(as, TCR, 0);
1444 if (spi_readl(as, SR) & SPI_BIT(TXEMPTY))
1449 while (spi_readl(as, SR) & SPI_BIT(RDRF))
1450 spi_readl(as, RDR);
1453 spi_readl(as, SR);
1455 } else if (atmel_spi_use_dma(as, xfer)) {
1461 && as->use_pdc)
1464 if (as->use_pdc)
1465 atmel_spi_disable_pdc_transfer(as);
1467 return as->done_status;
1481 static inline unsigned int atmel_get_version(struct atmel_spi *as)
1483 return spi_readl(as, VERSION) & 0x00000fff;
1486 static void atmel_get_caps(struct atmel_spi *as)
1490 version = atmel_get_version(as);
1492 as->caps.is_spi2 = version > 0x121;
1493 as->caps.has_wdrbt = version >= 0x210;
1494 as->caps.has_dma_support = version >= 0x212;
1495 as->caps.has_pdc_support = version < 0x212;
1498 static void atmel_spi_init(struct atmel_spi *as)
1500 spi_writel(as, CR, SPI_BIT(SWRST));
1501 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
1504 if (as->fifo_size)
1505 spi_writel(as, CR, SPI_BIT(FIFOEN));
1507 if (as->caps.has_wdrbt) {
1508 spi_writel(as, MR, SPI_BIT(WDRBT) | SPI_BIT(MODFDIS)
1511 spi_writel(as, MR, SPI_BIT(MSTR) | SPI_BIT(MODFDIS));
1514 if (as->use_pdc)
1515 spi_writel(as, PTCR, SPI_BIT(RXTDIS) | SPI_BIT(TXTDIS));
1516 spi_writel(as, CR, SPI_BIT(SPIEN));
1526 struct atmel_spi *as;
1540 host = spi_alloc_host(&pdev->dev, sizeof(*as));
1562 as = spi_controller_get_devdata(host);
1564 spin_lock_init(&as->lock);
1566 as->pdev = pdev;
1567 as->regs = devm_platform_get_and_ioremap_resource(pdev, 0, ®s);
1568 if (IS_ERR(as->regs)) {
1569 ret = PTR_ERR(as->regs);
1572 as->phybase = regs->start;
1573 as->irq = irq;
1574 as->clk = clk;
1576 init_completion(&as->xfer_completion);
1578 atmel_get_caps(as);
1580 as->use_dma = false;
1581 as->use_pdc = false;
1582 if (as->caps.has_dma_support) {
1583 ret = atmel_spi_configure_dma(host, as);
1585 as->use_dma = true;
1589 } else if (as->caps.has_pdc_support) {
1590 as->use_pdc = true;
1594 as->addr_rx_bbuf = dma_alloc_coherent(&pdev->dev,
1596 &as->dma_addr_rx_bbuf,
1598 if (!as->addr_rx_bbuf) {
1599 as->use_dma = false;
1601 as->addr_tx_bbuf = dma_alloc_coherent(&pdev->dev,
1603 &as->dma_addr_tx_bbuf,
1605 if (!as->addr_tx_bbuf) {
1606 as->use_dma = false;
1608 as->addr_rx_bbuf,
1609 as->dma_addr_rx_bbuf);
1612 if (!as->use_dma)
1617 if (as->caps.has_dma_support && !as->use_dma)
1620 if (as->use_pdc) {
1635 as->spi_clk = clk_get_rate(clk);
1637 as->fifo_size = 0;
1639 &as->fifo_size)) {
1640 dev_info(&pdev->dev, "Using FIFO (%u data)\n", as->fifo_size);
1643 atmel_spi_init(as);
1656 atmel_get_version(as), (unsigned long)regs->start,
1665 if (as->use_dma)
1668 spi_writel(as, CR, SPI_BIT(SWRST));
1669 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
1680 struct atmel_spi *as = spi_controller_get_devdata(host);
1685 if (as->use_dma) {
1690 as->addr_tx_bbuf,
1691 as->dma_addr_tx_bbuf);
1693 as->addr_rx_bbuf,
1694 as->dma_addr_rx_bbuf);
1698 spin_lock_irq(&as->lock);
1699 spi_writel(as, CR, SPI_BIT(SWRST));
1700 spi_writel(as, CR, SPI_BIT(SWRST)); /* AT91SAM9263 Rev B workaround */
1701 spi_readl(as, SR);
1702 spin_unlock_irq(&as->lock);
1704 clk_disable_unprepare(as->clk);
1713 struct atmel_spi *as = spi_controller_get_devdata(host);
1715 clk_disable_unprepare(as->clk);
1724 struct atmel_spi *as = spi_controller_get_devdata(host);
1728 return clk_prepare_enable(as->clk);
1750 struct atmel_spi *as = spi_controller_get_devdata(host);
1753 ret = clk_prepare_enable(as->clk);
1757 atmel_spi_init(as);
1759 clk_disable_unprepare(as->clk);