Lines Matching refs:pg
706 static int tegra_powergate_prepare_clocks(struct tegra_powergate *pg)
712 for (i = 0; i < pg->num_clks; i++) {
713 pg->clk_rates[i] = clk_get_rate(pg->clks[i]);
715 if (!pg->clk_rates[i]) {
720 if (pg->clk_rates[i] <= safe_rate)
729 err = clk_set_rate(pg->clks[i], safe_rate);
738 clk_set_rate(pg->clks[i], pg->clk_rates[i]);
743 static int tegra_powergate_unprepare_clocks(struct tegra_powergate *pg)
748 for (i = 0; i < pg->num_clks; i++) {
749 err = clk_set_rate(pg->clks[i], pg->clk_rates[i]);
757 static void tegra_powergate_disable_clocks(struct tegra_powergate *pg)
761 for (i = 0; i < pg->num_clks; i++)
762 clk_disable_unprepare(pg->clks[i]);
765 static int tegra_powergate_enable_clocks(struct tegra_powergate *pg)
770 for (i = 0; i < pg->num_clks; i++) {
771 err = clk_prepare_enable(pg->clks[i]);
780 clk_disable_unprepare(pg->clks[i]);
785 static int tegra_powergate_power_up(struct tegra_powergate *pg,
790 err = reset_control_assert(pg->reset);
796 err = tegra_powergate_set(pg->pmc, pg->id, true);
802 err = tegra_powergate_prepare_clocks(pg);
806 err = tegra_powergate_enable_clocks(pg);
812 err = __tegra_powergate_remove_clamping(pg->pmc, pg->id);
818 err = reset_control_deassert(pg->reset);
824 if (pg->pmc->soc->needs_mbist_war)
825 err = tegra210_clk_handle_mbist_war(pg->id);
830 tegra_powergate_disable_clocks(pg);
832 err = tegra_powergate_unprepare_clocks(pg);
839 tegra_powergate_disable_clocks(pg);
843 tegra_powergate_unprepare_clocks(pg);
846 tegra_powergate_set(pg->pmc, pg->id, false);
851 static int tegra_powergate_power_down(struct tegra_powergate *pg)
855 err = tegra_powergate_prepare_clocks(pg);
859 err = tegra_powergate_enable_clocks(pg);
865 err = reset_control_assert(pg->reset);
871 tegra_powergate_disable_clocks(pg);
875 err = tegra_powergate_set(pg->pmc, pg->id, false);
879 err = tegra_powergate_unprepare_clocks(pg);
886 tegra_powergate_enable_clocks(pg);
888 reset_control_deassert(pg->reset);
892 tegra_powergate_disable_clocks(pg);
895 tegra_powergate_unprepare_clocks(pg);
902 struct tegra_powergate *pg = to_powergate(domain);
903 struct device *dev = pg->pmc->dev;
906 err = tegra_powergate_power_up(pg, true);
909 pg->genpd.name, err);
913 reset_control_release(pg->reset);
921 struct tegra_powergate *pg = to_powergate(domain);
922 struct device *dev = pg->pmc->dev;
925 err = reset_control_acquire(pg->reset);
928 pg->genpd.name, err);
932 err = tegra_powergate_power_down(pg);
935 pg->genpd.name, err);
936 reset_control_release(pg->reset);
1005 struct tegra_powergate *pg;
1011 pg = kzalloc(sizeof(*pg), GFP_KERNEL);
1012 if (!pg)
1015 pg->clk_rates = kzalloc(sizeof(*pg->clk_rates), GFP_KERNEL);
1016 if (!pg->clk_rates) {
1017 kfree(pg->clks);
1021 pg->id = id;
1022 pg->clks = &clk;
1023 pg->num_clks = 1;
1024 pg->reset = rst;
1025 pg->pmc = pmc;
1027 err = tegra_powergate_power_up(pg, false);
1032 kfree(pg->clk_rates);
1033 kfree(pg);
1191 static int tegra_powergate_of_get_clks(struct tegra_powergate *pg,
1202 pg->clks = kcalloc(count, sizeof(clk), GFP_KERNEL);
1203 if (!pg->clks)
1206 pg->clk_rates = kcalloc(count, sizeof(*pg->clk_rates), GFP_KERNEL);
1207 if (!pg->clk_rates) {
1208 kfree(pg->clks);
1213 pg->clks[i] = of_clk_get(np, i);
1214 if (IS_ERR(pg->clks[i])) {
1215 err = PTR_ERR(pg->clks[i]);
1220 pg->num_clks = count;
1226 clk_put(pg->clks[i]);
1228 kfree(pg->clk_rates);
1229 kfree(pg->clks);
1234 static int tegra_powergate_of_get_resets(struct tegra_powergate *pg,
1237 struct device *dev = pg->pmc->dev;
1240 pg->reset = of_reset_control_array_get_exclusive_released(np);
1241 if (IS_ERR(pg->reset)) {
1242 err = PTR_ERR(pg->reset);
1247 err = reset_control_acquire(pg->reset);
1254 err = reset_control_assert(pg->reset);
1256 err = reset_control_deassert(pg->reset);
1260 reset_control_release(pg->reset);
1265 reset_control_release(pg->reset);
1266 reset_control_put(pg->reset);
1275 struct tegra_powergate *pg;
1279 pg = kzalloc(sizeof(*pg), GFP_KERNEL);
1280 if (!pg)
1296 pg->id = id;
1297 pg->genpd.name = np->name;
1298 pg->genpd.power_off = tegra_genpd_power_off;
1299 pg->genpd.power_on = tegra_genpd_power_on;
1300 pg->pmc = pmc;
1302 off = !tegra_powergate_is_powered(pmc, pg->id);
1304 err = tegra_powergate_of_get_clks(pg, np);
1310 err = tegra_powergate_of_get_resets(pg, np, off);
1318 WARN_ON(tegra_powergate_power_up(pg, true));
1323 err = pm_genpd_init(&pg->genpd, NULL, off);
1330 err = of_genpd_add_provider_simple(np, &pg->genpd);
1337 dev_dbg(dev, "added PM domain %s\n", pg->genpd.name);
1342 pm_genpd_remove(&pg->genpd);
1345 reset_control_put(pg->reset);
1348 while (pg->num_clks--)
1349 clk_put(pg->clks[pg->num_clks]);
1351 kfree(pg->clks);
1357 kfree(pg);
1497 struct tegra_powergate *pg = to_powergate(genpd);
1499 reset_control_put(pg->reset);
1501 while (pg->num_clks--)
1502 clk_put(pg->clks[pg->num_clks]);
1504 kfree(pg->clks);
1506 set_bit(pg->id, pmc->powergates_available);
1508 kfree(pg);