Lines Matching defs:master
1367 const struct pmic_wrapper_type *master;
1395 return readl(wrp->base + wrp->master->regs[reg]);
1400 writel(val, wrp->base + wrp->master->regs[reg]);
1408 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
1464 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
1475 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
1535 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB)) {
1615 pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSL,
1617 pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS,
1619 pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_CSH,
1623 pwrap_writel(wrp, wrp->master->spi_w | PWRAP_MAN_CMD_OP_OUTS,
1739 switch (wrp->master->type) {
1840 switch (wrp->master->type) {
1957 wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
2035 /* enable 2wire SPI master */
2067 switch (wrp->master->type) {
2088 pwrap_writel(wrp, wrp->master->arb_en_all, PWRAP_HIPRIO_ARB_EN);
2092 ret = wrp->master->init_reg_clock(wrp);
2117 if (wrp->master->type == PWRAP_MT8135)
2126 if (wrp->master->init_soc_specific) {
2127 ret = wrp->master->init_soc_specific(wrp);
2137 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_BRIDGE)) {
2154 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_INT1_EN)) {
2492 wrp->master = of_device_get_match_data(&pdev->dev);
2500 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_RESET)) {
2509 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_BRIDGE)) {
2569 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_DCM)) {
2586 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
2588 else if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB_MT8186))
2600 if (!HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
2607 pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN);
2608 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_WDT_SRC1))
2609 pwrap_writel(wrp, wrp->master->wdt_src, PWRAP_WDT_SRC_EN_1);
2611 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_ARB))
2616 pwrap_writel(wrp, wrp->master->int_en_all, PWRAP_INT_EN);
2621 if (HAS_CAP(wrp->master->caps, PWRAP_CAP_INT1_EN))
2622 pwrap_writel(wrp, wrp->master->int1_en_all, PWRAP_INT1_EN);