Lines Matching defs:npe
24 #include <linux/soc/ixp4xx/npe.h>
127 #define print_npe(pri, npe, fmt, ...) \
128 printk(pri "%s: " fmt, npe_name(npe), ## __VA_ARGS__)
131 #define debug_msg(npe, fmt, ...) \
132 print_npe(KERN_DEBUG, npe, fmt, ## __VA_ARGS__)
134 #define debug_msg(npe, fmt, ...)
155 static struct npe npe_tab[NPE_COUNT] = {
165 int npe_running(struct npe *npe)
167 return (__raw_readl(&npe->regs->exec_status_cmd) & STAT_RUN) != 0;
170 static void npe_cmd_write(struct npe *npe, u32 addr, int cmd, u32 data)
172 __raw_writel(data, &npe->regs->exec_data);
173 __raw_writel(addr, &npe->regs->exec_addr);
174 __raw_writel(cmd, &npe->regs->exec_status_cmd);
177 static u32 npe_cmd_read(struct npe *npe, u32 addr, int cmd)
179 __raw_writel(addr, &npe->regs->exec_addr);
180 __raw_writel(cmd, &npe->regs->exec_status_cmd);
184 __raw_readl(&npe->regs->exec_data);
185 __raw_readl(&npe->regs->exec_data);
186 return __raw_readl(&npe->regs->exec_data);
189 static void npe_clear_active(struct npe *npe, u32 reg)
191 u32 val = npe_cmd_read(npe, reg, CMD_RD_ECS_REG);
192 npe_cmd_write(npe, reg, CMD_WR_ECS_REG, val & ~ECS_REG_0_ACTIVE);
195 static void npe_start(struct npe *npe)
198 npe_clear_active(npe, ECS_PRI_1_CTXT_REG_0);
199 npe_clear_active(npe, ECS_PRI_2_CTXT_REG_0);
200 npe_clear_active(npe, ECS_DBG_CTXT_REG_0);
202 __raw_writel(CMD_NPE_CLR_PIPE, &npe->regs->exec_status_cmd);
203 __raw_writel(CMD_NPE_START, &npe->regs->exec_status_cmd);
206 static void npe_stop(struct npe *npe)
208 __raw_writel(CMD_NPE_STOP, &npe->regs->exec_status_cmd);
209 __raw_writel(CMD_NPE_CLR_PIPE, &npe->regs->exec_status_cmd); /*FIXME?*/
212 static int __must_check npe_debug_instr(struct npe *npe, u32 instr, u32 ctx,
219 npe_cmd_write(npe, ECS_DBG_CTXT_REG_0, CMD_WR_ECS_REG,
227 npe_cmd_write(npe, ECS_DBG_CTXT_REG_1, CMD_WR_ECS_REG,
232 __raw_writel(CMD_NPE_CLR_PIPE, &npe->regs->exec_status_cmd);
235 npe_cmd_write(npe, ECS_INSTRUCT_REG, CMD_WR_ECS_REG, instr);
239 wc = __raw_readl(&npe->regs->watch_count);
242 __raw_writel(CMD_NPE_STEP, &npe->regs->exec_status_cmd);
246 if (wc != __raw_readl(&npe->regs->watch_count))
251 print_npe(KERN_ERR, npe, "reset: npe_debug_instr(): timeout\n");
255 static int __must_check npe_logical_reg_write8(struct npe *npe, u32 addr,
263 return npe_debug_instr(npe, instr, ctx, 1); /* execute it */
266 static int __must_check npe_logical_reg_write16(struct npe *npe, u32 addr,
274 return npe_debug_instr(npe, instr, ctx, 1); /* execute it */
277 static int __must_check npe_logical_reg_write32(struct npe *npe, u32 addr,
281 if (npe_logical_reg_write16(npe, addr, val >> 16, ctx))
283 return npe_logical_reg_write16(npe, addr + 2, val & 0xFFFF, ctx);
286 static int npe_reset(struct npe *npe)
288 u32 reset_bit = (IXP4XX_FEATURE_RESET_NPEA << npe->id);
292 ctl = (__raw_readl(&npe->regs->messaging_control) | 0x3F000000) &
296 __raw_writel(ctl & 0x3F00FFFF, &npe->regs->messaging_control);
300 exec_count = __raw_readl(&npe->regs->exec_count);
301 __raw_writel(0, &npe->regs->exec_count);
304 ctx_reg2 = npe_cmd_read(npe, ECS_DBG_CTXT_REG_2, CMD_RD_ECS_REG);
305 npe_cmd_write(npe, ECS_DBG_CTXT_REG_2, CMD_WR_ECS_REG, ctx_reg2 |
309 while (__raw_readl(&npe->regs->watchpoint_fifo) & WFIFO_VALID)
311 while (__raw_readl(&npe->regs->messaging_status) & MSGSTAT_OFNE)
313 print_npe(KERN_DEBUG, npe, "npe_reset: read FIFO = 0x%X\n",
314 __raw_readl(&npe->regs->in_out_fifo));
316 while (__raw_readl(&npe->regs->messaging_status) & MSGSTAT_IFNE)
319 if (npe_debug_instr(npe, INSTR_RD_FIFO, 0, 0))
323 __raw_writel(RESET_MBOX_STAT, &npe->regs->mailbox_status);
325 if (npe_debug_instr(npe, INSTR_RESET_MBOX, 0, 0))
330 if (npe_logical_reg_write16(npe, NPE_REGMAP, val >> 1, 0))
333 if (npe_logical_reg_write32(npe, (val & 1) * 4, 0, 0))
341 val = npe_cmd_read(npe, ECS_BG_CTXT_REG_0, CMD_RD_ECS_REG);
344 npe_cmd_write(npe, ECS_BG_CTXT_REG_0, CMD_WR_ECS_REG, val);
349 if (npe_logical_reg_write8(npe, NPE_STEVT, 0x80, i))
351 if (npe_logical_reg_write16(npe, NPE_STARTPC, 0, i))
355 if (npe_logical_reg_write16(npe, NPE_REGMAP, 0x820, i))
357 if (npe_logical_reg_write8(npe, NPE_CINDEX, 0, i))
363 npe_cmd_write(npe, ECS_DBG_CTXT_REG_0, CMD_WR_ECS_REG, 0);
365 __raw_writel(CMD_NPE_CLR_PIPE, &npe->regs->exec_status_cmd);
367 __raw_writel(exec_count, &npe->regs->exec_count);
368 npe_cmd_write(npe, ECS_DBG_CTXT_REG_2, CMD_WR_ECS_REG, ctx_reg2);
372 npe_cmd_write(npe, ecs_reset[val].reg, CMD_WR_ECS_REG,
376 __raw_writel(CMD_CLR_PROFILE_CNT, &npe->regs->exec_status_cmd);
378 __raw_writel(0, &npe->regs->exec_count);
379 __raw_writel(0, &npe->regs->action_points[0]);
380 __raw_writel(0, &npe->regs->action_points[1]);
381 __raw_writel(0, &npe->regs->action_points[2]);
382 __raw_writel(0, &npe->regs->action_points[3]);
383 __raw_writel(0, &npe->regs->watch_count);
389 val = cpu_ixp4xx_features(npe->rmap);
391 regmap_write(npe->rmap, IXP4XX_EXP_CNFG2, val & ~reset_bit);
393 regmap_write(npe->rmap, IXP4XX_EXP_CNFG2, val | reset_bit);
396 val = cpu_ixp4xx_features(npe->rmap);
404 npe_stop(npe);
407 __raw_writel(ctl, &npe->regs->messaging_control);
412 int npe_send_message(struct npe *npe, const void *msg, const char *what)
417 debug_msg(npe, "Trying to send message %s [%08X:%08X]\n",
420 if (__raw_readl(&npe->regs->messaging_status) & MSGSTAT_IFNE) {
421 debug_msg(npe, "NPE input FIFO not empty\n");
425 __raw_writel(send[0], &npe->regs->in_out_fifo);
427 if (!(__raw_readl(&npe->regs->messaging_status) & MSGSTAT_IFNF)) {
428 debug_msg(npe, "NPE input FIFO full\n");
432 __raw_writel(send[1], &npe->regs->in_out_fifo);
435 (__raw_readl(&npe->regs->messaging_status) & MSGSTAT_IFNE)) {
441 debug_msg(npe, "Timeout sending message\n");
446 debug_msg(npe, "Sending a message took %i cycles\n", cycles);
451 int npe_recv_message(struct npe *npe, void *msg, const char *what)
456 debug_msg(npe, "Trying to receive message %s\n", what);
459 if (__raw_readl(&npe->regs->messaging_status) & MSGSTAT_OFNE) {
460 recv[cnt++] = __raw_readl(&npe->regs->in_out_fifo);
471 debug_msg(npe, "Received [%08X]\n", recv[0]);
474 debug_msg(npe, "Received [%08X:%08X]\n", recv[0], recv[1]);
479 debug_msg(npe, "Timeout waiting for message\n");
484 debug_msg(npe, "Receiving a message took %i cycles\n", cycles);
489 int npe_send_recv_message(struct npe *npe, void *msg, const char *what)
494 if ((result = npe_send_message(npe, msg, what)) != 0)
496 if ((result = npe_recv_message(npe, recv, what)) != 0)
500 debug_msg(npe, "Message %s: unexpected message received\n",
508 int npe_load_firmware(struct npe *npe, const char *name, struct device *dev)
541 print_npe(KERN_ERR, npe, "incomplete firmware file\n");
547 print_npe(KERN_DEBUG, npe, "firmware: %08X %08X %08X (0x%X bytes)\n",
555 print_npe(KERN_ERR, npe, "bad firmware file magic: 0x%X\n",
560 print_npe(KERN_ERR, npe,
564 if (((image->id >> 24) & 0xF /* NPE ID */) != npe->id) {
565 print_npe(KERN_ERR, npe, "firmware file NPE ID mismatch\n");
573 print_npe(KERN_INFO, npe, "IXP43x/IXP46x firmware ignored on "
578 if (npe_running(npe)) {
579 print_npe(KERN_INFO, npe, "unable to load firmware, NPE is "
585 npe_stop(npe);
586 npe_reset(npe);
589 print_npe(KERN_INFO, npe, "firmware functionality 0x%X, "
594 if (!npe->id)
609 print_npe(KERN_INFO, npe, "firmware EOF block marker not "
615 print_npe(KERN_DEBUG, npe, "%i firmware blocks found\n", blocks);
622 print_npe(KERN_INFO, npe, "invalid offset 0x%X of "
637 print_npe(KERN_INFO, npe, "invalid firmware block #%i "
642 print_npe(KERN_INFO, npe, "firmware block #%i doesn't "
651 npe_cmd_write(npe, cb->npe_addr + j, cmd, cb->data[j]);
654 npe_start(npe);
655 if (!npe_running(npe))
656 print_npe(KERN_ERR, npe, "unable to start\n");
661 print_npe(KERN_INFO, npe, "firmware block #%i doesn't fit in NPE "
671 struct npe *npe_request(unsigned id)
680 void npe_release(struct npe *npe)
701 struct npe *npe = &npe_tab[i];
714 npe->regs = devm_ioremap_resource(dev, res);
715 if (IS_ERR(npe->regs))
716 return PTR_ERR(npe->regs);
717 npe->rmap = rmap;
719 if (npe_reset(npe)) {
724 npe->valid = 1;
760 .name = "ixp4xx-npe",