Lines Matching defs:tdm
125 struct tsa_tdm tdm[2]; /* TDMa and TDMb */
366 struct tsa_tdm *tdm;
410 tdm = &tsa->tdm[tdm_id];
412 serial_info->rx_fs_rate = clk_get_rate(tdm->l1rsync_clk);
413 serial_info->rx_bit_rate = clk_get_rate(tdm->l1rclk_clk);
416 serial_info->tx_fs_rate = tdm->l1tsync_clk ?
417 clk_get_rate(tdm->l1tsync_clk) :
418 clk_get_rate(tdm->l1rsync_clk);
419 serial_info->tx_bit_rate = tdm->l1tclk_clk ?
420 clk_get_rate(tdm->l1tclk_clk) :
421 clk_get_rate(tdm->l1rclk_clk);
445 struct tsa_tdm *tdm;
452 tsa->tdm[0].is_enable = false;
453 tsa->tdm[1].is_enable = false;
485 tdm = &tsa->tdm[tdm_id];
486 tdm->simode_tdm = TSA_SIMODE_TDM_SDM_NORM;
505 tdm->simode_tdm |= TSA_SIMODE_TDM_RFSD(val);
524 tdm->simode_tdm |= TSA_SIMODE_TDM_TFSD(val);
527 tdm->simode_tdm |= TSA_SIMODE_TDM_CRT;
530 tdm->simode_tdm |= TSA_SIMODE_TDM_CE;
533 tdm->simode_tdm |= TSA_SIMODE_TDM_FE;
536 tdm->simode_tdm |= TSA_SIMODE_TDM_DSC;
550 tdm->l1rsync_clk = clk;
564 tdm->l1rclk_clk = clk;
566 if (!(tdm->simode_tdm & TSA_SIMODE_TDM_CRT)) {
579 tdm->l1tsync_clk = clk;
593 tdm->l1tclk_clk = clk;
608 tdm->is_enable = true;
614 if (tsa->tdm[i].l1rsync_clk) {
615 clk_disable_unprepare(tsa->tdm[i].l1rsync_clk);
616 clk_put(tsa->tdm[i].l1rsync_clk);
618 if (tsa->tdm[i].l1rclk_clk) {
619 clk_disable_unprepare(tsa->tdm[i].l1rclk_clk);
620 clk_put(tsa->tdm[i].l1rclk_clk);
622 if (tsa->tdm[i].l1tsync_clk) {
623 clk_disable_unprepare(tsa->tdm[i].l1rsync_clk);
624 clk_put(tsa->tdm[i].l1rsync_clk);
626 if (tsa->tdm[i].l1tclk_clk) {
627 clk_disable_unprepare(tsa->tdm[i].l1rclk_clk);
628 clk_put(tsa->tdm[i].l1rclk_clk);
685 if (tsa->tdm[0].is_enable)
686 val |= TSA_SIMODE_TDMA(tsa->tdm[0].simode_tdm);
687 if (tsa->tdm[1].is_enable)
688 val |= TSA_SIMODE_TDMB(tsa->tdm[1].simode_tdm);
715 if (tsa->tdm[i].l1rsync_clk) {
716 clk_disable_unprepare(tsa->tdm[i].l1rsync_clk);
717 clk_put(tsa->tdm[i].l1rsync_clk);
719 if (tsa->tdm[i].l1rclk_clk) {
720 clk_disable_unprepare(tsa->tdm[i].l1rclk_clk);
721 clk_put(tsa->tdm[i].l1rclk_clk);
723 if (tsa->tdm[i].l1tsync_clk) {
724 clk_disable_unprepare(tsa->tdm[i].l1rsync_clk);
725 clk_put(tsa->tdm[i].l1rsync_clk);
727 if (tsa->tdm[i].l1tclk_clk) {
728 clk_disable_unprepare(tsa->tdm[i].l1rclk_clk);
729 clk_put(tsa->tdm[i].l1rclk_clk);