Lines Matching refs:ctrl
89 static struct brcmstb_pm_control ctrl;
134 void __iomem *base = ctrl.aon_ctrl_base;
156 void __iomem *base = ctrl.aon_ctrl_base;
161 AON_SAVE_SRAM(ctrl.aon_sram_base, 0, 0);
189 AON_SAVE_SRAM(ctrl.aon_sram_base, 0, BRCMSTB_S3_MAGIC);
190 AON_SAVE_SRAM(ctrl.aon_sram_base, 1, (u32)&s3_reentry);
191 AON_SAVE_SRAM(ctrl.aon_sram_base, 2, 0);
194 tmp = __raw_readl(ctrl.aon_ctrl_base + AON_CTRL_RESET_CTRL);
196 __raw_writel(tmp, ctrl.aon_ctrl_base + AON_CTRL_RESET_CTRL);
201 for (i = 0; i < ctrl.num_memc; i++) {
202 tmp = __raw_readl(ctrl.memcs[i].ddr_phy_base +
206 __raw_writel(tmp, ctrl.memcs[i].ddr_phy_base +
209 __raw_writel(tmp, ctrl.memcs[i].ddr_phy_base +
217 memc_arb_base = ctrl.memcs[0].arb_base + 4;
227 brcm_pm_do_s3(ctrl.aon_ctrl_base, current_cpu_data.dcache.linesz);
235 memc_arb_base = ctrl.memcs[0].arb_base + 4;
267 s2_params[0] = (u32)ctrl.aon_ctrl_base;
268 s2_params[1] = (u32)ctrl.memcs[0].ddr_phy_base;
269 s2_params[2] = (u32)ctrl.timers_base;
339 { .compatible = "brcm,brcmstb-aon-ctrl" },
386 /* AON ctrl registers */
392 ctrl.aon_ctrl_base = base;
400 ctrl.aon_sram_base = base;
402 ctrl.num_memc = 0;
405 i = ctrl.num_memc;
417 ctrl.memcs[i].ddr_phy_base = base;
418 ctrl.num_memc++;
427 ctrl.memcs[0].arb_base = base;
435 ctrl.timers_base = base;
445 iounmap(ctrl.memcs[0].arb_base);
447 for (i = 0; i < ctrl.num_memc; i++)
448 iounmap(ctrl.memcs[i].ddr_phy_base);
450 iounmap(ctrl.aon_sram_base);
452 iounmap(ctrl.aon_ctrl_base);