Lines Matching refs:inb
88 x = inb(qbase + 0xd);
110 if (reqlen >= 128 && (inb(qbase + 8) & 2)) { /* full */
116 if ((j = inb(qbase + 8)) & 4)
122 if (reqlen >= 44 && (inb(qbase + 8) & 8)) { /* 1/3 */
135 while (reqlen && !((j = inb(qbase + 8)) & 0x10))
137 *request++ = inb(qbase + 4);
141 j = inb(qbase + 8);
147 if (reqlen >= 128 && inb(qbase + 8) & 0x10) { /* empty */
153 if (!((j = inb(qbase + 8)) & 8)) {
158 if (reqlen >= 40 && !(inb(qbase + 8) & 4)) { /* 2/3 */
169 while (reqlen && !((j = inb(qbase + 8)) & 2))
175 j = inb(qbase + 8);
179 return inb(qbase + 8) & 0xc0;
195 !((k = inb(qbase + 4)) & 0xe0)) {
229 inb(qbase + 5); /* clear interrupts */
230 if (inb(qbase + 5)) /* if still interrupting */
232 else if (inb(qbase + 7) & 0x1f)
234 while (inb(qbase + 5)); /* clear ints */
238 inb(qbase + 8); /* clear int bits */
278 j = inb(qbase + 6);
279 i = inb(qbase + 5);
284 i |= inb(qbase + 5); /* the 0x10 bit can be set after the 0x08 */
291 j &= 7; /* j = inb( qbase + 7 ) >> 5; */
300 j, i, inb(qbase + 7) & 0x1f);
306 if (inb(qbase + 7) & 0x1f) /* if some bytes in fifo */
311 if (reqlen && !((phase = inb(qbase + 4)) & 6)) { /* data phase */
342 k = inb(qbase + 5); /* should be 0x10, bus service */
352 !(inb(qbase + 4) & 6))
362 while (inb(qbase + 5))
376 i = inb(qbase + 5); /* get chip irq stat */
377 j = inb(qbase + 7) & 0x1f; /* and bytes rec'd */
378 status = inb(qbase + 2);
379 message = inb(qbase + 2);
400 i = inb(qbase + 5); /* should be bus service */
404 i |= inb(qbase + 5);
433 if (!(inb(qbase + 4) & 0x80)) /* false alarm? */
439 while (i-- && inb(qbase + 5)); /* maybe also ql_zap() */
563 return inb(qbase + 0xe) & 0xf8;
583 while (inb(qbase + 0xf) & 4)
597 return (((inb(qbase + 0xe) ^ inb(qbase + 0xe)) == 7) &&
598 ((inb(qbase + 0xe) ^ inb(qbase + 0xe)) == 7));