Lines Matching defs:temp
1357 uint32_t temp;
1384 temp = off8 + (i << shift_amount);
1385 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp);
1386 temp = 0;
1387 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp);
1388 temp = MIU_TA_CTL_ENABLE;
1389 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);
1390 temp = MIU_TA_CTL_START_ENABLE;
1391 qla4_82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);
1394 temp = qla4_82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);
1395 if ((temp & MIU_TA_CTL_BUSY) == 0)
1409 temp = qla4_82xx_rd_32(ha,
1411 word[i] |= ((uint64_t)temp << (32 * (k & 1)));
1448 uint32_t temp;
1509 temp = off8 + (i << shift_amount);
1510 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp);
1511 temp = 0;
1512 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp);
1513 temp = word[i * scale] & 0xffffffff;
1514 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp);
1515 temp = (word[i * scale] >> 32) & 0xffffffff;
1516 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp);
1517 temp = word[i*scale + 1] & 0xffffffff;
1519 temp);
1520 temp = (word[i*scale + 1] >> 32) & 0xffffffff;
1522 temp);
1524 temp = MIU_TA_CTL_WRITE_ENABLE;
1525 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_CTRL, temp);
1526 temp = MIU_TA_CTL_WRITE_START;
1527 qla4_82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_CTRL, temp);
1530 temp = qla4_82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);
1531 if ((temp & MIU_TA_CTL_BUSY) == 0)
1817 uint32_t temp;
1821 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp);
1822 if ((temp & mask) != 0)
1839 uint32_t temp;
1846 temp = (0x40000000 | addr);
1847 ha->isp_ops->wr_reg_indirect(ha, addr1, temp);
1868 uint32_t temp;
1873 ql4_84xx_ipmdio_rd_reg(ha, addr1, addr3, mask, addr2, &temp);
1874 if ((temp & 0x1) != 1)
2631 uint32_t addr1, addr2, value, data, temp, wrval;
2658 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp);
2659 if ((temp & mask) != 0)
2669 ha->isp_ops->rd_reg_indirect(ha, addr2, &temp);
2670 temp = temp & modify_mask;
2671 temp = (temp | ((loop_cnt << 16) | loop_cnt));
2672 wrval = ((temp << 16) | temp);
2679 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp);
2680 if ((temp & mask) != 0)
2696 ha->isp_ops->rd_reg_indirect(ha, addr1, &temp);
2697 if ((temp & mask) != 0)