Lines Matching defs:drv_active
579 uint32_t drv_state, drv_active;
583 drv_active = qla8044_rd_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX);
588 if (ha->flags.eeh_busy && drv_active)
1366 uint32_t drv_active;
1369 drv_active = qla8044_rd_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX);
1370 drv_active &= ~(1 << (ha->portnum));
1373 "%s(%ld): drv_active: 0x%08x\n",
1374 __func__, vha->host_no, drv_active);
1376 qla8044_wr_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX, drv_active);
1628 /* For ISP8044, drv_active register has 1 bit per function,
1647 uint32_t dev_state = 0, drv_state, drv_active;
1666 drv_active = qla8044_rd_direct(vha,
1670 "%s(%ld): drv_state = 0x%x, drv_active = 0x%x dev_state = 0x%x\n",
1671 __func__, vha->host_no, drv_state, drv_active, dev_state);
1681 "%s: Function %d: Reset Ack Timeout!, drv_state: 0x%08x, drv_active: 0x%08x\n",
1682 __func__, ha->portnum, drv_state, drv_active);
1694 drv_active = qla8044_rd_direct(vha,
1696 } while (((drv_state & drv_active) != drv_active) &&
1700 if (drv_state != drv_active) {
1702 "%s(%ld): Function %d turning off drv_active of non-acking function 0x%x\n",
1704 (drv_active ^ drv_state));
1705 drv_active = drv_active & drv_state;
1707 drv_active);
1722 if (!(drv_active & (1 << ha->portnum))) {
1732 ((drv_state & drv_active) == QLA8044_FUN7_ACTIVE_INDEX)) {
1741 uint32_t drv_active;
1744 drv_active = qla8044_rd_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX);
1746 /* For ISP8044, drv_active register has 1 bit per function,
1748 drv_active |= (1 << ha->portnum);
1751 "%s(%ld): drv_active: 0x%08x\n",
1752 __func__, vha->host_no, drv_active);
1753 qla8044_wr_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX, drv_active);
1759 uint32_t drv_active;
1762 drv_active = qla8044_rd_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX);
1763 if (drv_active & (1 << ha->portnum))
1787 uint32_t drv_active;
1791 drv_active = qla8044_rd_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX);
1792 if (drv_active == (1 << ha->portnum)) {
1831 uint32_t drv_active;
1841 drv_active = qla8044_rd_direct(vha,
1846 if ((drv_active == (1 << ha->portnum)) && !ql2xdontresethba)
1866 uint32_t drv_state, drv_active, dev_state;
1879 drv_active = qla8044_rd_direct(vha, QLA8044_CRB_DRV_ACTIVE_INDEX);
1881 /* Shift drv_active by 1 to match drv_state. As quiescent ready bit
1883 drv_active = drv_active << 1;
1885 while (drv_state != drv_active) {
1904 drv_active = qla8044_rd_direct(vha,
1906 drv_active = drv_active << 1;
3993 * For ISP8044, drv_active register has 1 bit per function,
3995 * For ISP82xx, drv_active has 4 bits per function