Lines Matching defs:tmplt_hdr
3680 struct qla82xx_md_template_hdr *tmplt_hdr;
3684 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr;
3743 addr = tmplt_hdr->saved_state_array[index];
3749 tmplt_hdr->saved_state_array[index] = read_value;
3756 addr = tmplt_hdr->saved_state_array[index];
3763 tmplt_hdr->saved_state_array[index];
3773 read_value = tmplt_hdr->saved_state_array[index];
3780 tmplt_hdr->saved_state_array[index] = read_value;
4111 struct qla82xx_md_template_hdr *tmplt_hdr;
4116 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr;
4148 no_entry_hdr = tmplt_hdr->num_of_entries;
4153 "Capture Mask obtained: 0x%x\n", tmplt_hdr->capture_debug_level);
4155 f_capture_mask = tmplt_hdr->capture_debug_level & 0xFF;
4164 tmplt_hdr->driver_capture_mask = ql2xmdcapmask;
4166 tmplt_hdr->driver_info[0] = vha->host_no;
4167 tmplt_hdr->driver_info[1] = (QLA_DRIVER_MAJOR_VER << 24) |
4177 if (tmplt_hdr->entry_type != QLA82XX_TLHDR) {
4180 tmplt_hdr->entry_type);
4185 (((uint8_t *)ha->md_tmplt_hdr) + tmplt_hdr->first_entry_offset);
4318 struct qla82xx_md_template_hdr *tmplt_hdr;
4320 tmplt_hdr = (struct qla82xx_md_template_hdr *)ha->md_tmplt_hdr;
4323 ql2xmdcapmask = tmplt_hdr->capture_debug_level & 0xFF;
4331 ha->md_dump_size += tmplt_hdr->capture_size_array[k];