Lines Matching defs:mem_crb
1290 uint64_t off8, mem_crb, tmpw, word[2] = {0, 0};
1296 mem_crb = QLA82XX_CRB_QDR_NET;
1298 mem_crb = QLA82XX_CRB_DDR_NET;
1350 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_LO, temp);
1352 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_ADDR_HI, temp);
1354 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_LO, temp);
1356 qla82xx_wr_32(ha, mem_crb+MIU_TEST_AGT_WRDATA_HI, temp);
1358 qla82xx_wr_32(ha, mem_crb +
1361 qla82xx_wr_32(ha, mem_crb +
1365 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);
1367 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);
1370 temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);
1427 uint64_t off8, val, mem_crb, word[2] = {0, 0};
1434 mem_crb = QLA82XX_CRB_QDR_NET;
1436 mem_crb = QLA82XX_CRB_DDR_NET;
1452 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_LO, temp);
1454 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_ADDR_HI, temp);
1456 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);
1458 qla82xx_wr_32(ha, mem_crb + MIU_TEST_AGT_CTRL, temp);
1461 temp = qla82xx_rd_32(ha, mem_crb + MIU_TEST_AGT_CTRL);
1477 mem_crb + MIU_TEST_AGT_RDDATA(k));