Lines Matching defs:BIT_1
108 #define BIT_1 0x2
230 #define IDC_PEG_HALT_STATUS_CHANGE BIT_1
250 #define QLA83XX_IDC_GRACEFUL_RESET BIT_1
416 #define SRB_GOT_BUF BIT_1
534 #define SRB_LOGIN_COND_PLOGI BIT_1
584 #define SRB_FXDISC_RESP_DMA_VALID BIT_1
824 #define CSR_FLASH_ENABLE BIT_1 /* Flash BIOS Read/Write enable */
842 #define NVR_SELECT BIT_1
1099 #define MBX_DMA_OUT BIT_1
1112 #define MBX_DMA_OUT BIT_1
1240 #define FO1_AE_ALL_LIP_RESET BIT_1
1254 #define FO2_REV_LOOPBACK BIT_1
1257 #define FO3_AE_RND_ERROR BIT_1
1422 #define MBX_1 BIT_1
1530 #define QLA_ZIO_MODE_6 (BIT_2 | BIT_1)
2015 #define CF_HEAD_TAG BIT_1
2176 #define RF_BUSY BIT_1 /* Busy */
2195 #define SS_CHECK_CONDITION BIT_1
2418 #define NOTIFY24XX_FLAGS_GLOBAL_TPRLO BIT_1
2765 #define FCF_LOGIN_NEEDED BIT_1
3271 #define FC4_FF_INITIATOR BIT_1
3296 SF_QUEUED = BIT_1,
3301 FS_FC4TYPE_NVME = BIT_1,
3407 #define VP_OPTS_VP_DISABLE BIT_1
4261 #define DT_ISP2200 BIT_1
4542 #define FW_ATTR_H_NVME_FBURST BIT_1
4986 #define DFLG_NO_CABLE BIT_1
5119 #define DPORT_DIAG_CHIP_RESET_IN_PROGRESS BIT_1
5136 #define QLA28XX_AUX_IMG_VPD_NVRAM BIT_1
5376 #define FC_LL_LC BIT_1 /* LongWave laser */