Lines Matching refs:nv
575 struct nvram *nv;
585 nv = &ha->nvram;
594 if (nv->id0 != 'I' || nv->id1 != 'S' ||
595 nv->id2 != 'P' || nv->id3 != ' ' || nv->version < 1) {
608 " version %i\n", nv->id0, nv->id1, nv->id2, nv->id3,
609 nv->version);
637 nv->isp_parameter = cpu_to_le16(nv->isp_parameter);
638 nv->firmware_feature.w = cpu_to_le16(nv->firmware_feature.w);
640 nv->bus[i].selection_timeout = cpu_to_le16(nv->bus[i].selection_timeout);
641 nv->bus[i].max_queue_depth = cpu_to_le16(nv->bus[i].max_queue_depth);
1109 struct nvram *nv;
1112 nv = &ha->nvram;
1119 mb[2] = nv->bus[bus].target[target].parameter.renegotiate_on_error << 8;
1120 mb[2] |= nv->bus[bus].target[target].parameter.stop_queue_on_check << 9;
1121 mb[2] |= nv->bus[bus].target[target].parameter.auto_request_sense << 10;
1122 mb[2] |= nv->bus[bus].target[target].parameter.tag_queuing << 11;
1123 mb[2] |= nv->bus[bus].target[target].parameter.enable_sync << 12;
1124 mb[2] |= nv->bus[bus].target[target].parameter.enable_wide << 13;
1125 mb[2] |= nv->bus[bus].target[target].parameter.parity_checking << 14;
1126 mb[2] |= nv->bus[bus].target[target].parameter.disconnect_allowed << 15;
1129 mb[2] |= nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr << 5;
1130 mb[3] = (nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8);
1131 mb[6] = (nv->bus[bus].target[target].ppr_1x160.flags.ppr_options << 8) |
1132 nv->bus[bus].target[target].ppr_1x160.flags.ppr_bus_width;
1135 mb[3] = (nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8);
1137 mb[3] |= nv->bus[bus].target[target].sync_period;
1146 mb[2] = nv->bus[bus].max_queue_depth;
1147 mb[3] = nv->bus[bus].target[target].execution_throttle;
1178 struct nvram *nv;
1182 nv = &ha->nvram;
1194 nv->bus[bus].target[target].parameter.enable_sync = device->sdtr;
1195 nv->bus[bus].target[target].parameter.enable_wide = device->wdtr;
1196 nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr = device->ppr;
1201 nv->bus[bus].target[target].parameter.enable_sync = 0;
1205 nv->bus[bus].target[target].parameter.enable_wide = 0;
1210 nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 0;
1214 if (nv->bus[bus].target[target].parameter.enable_sync)
1925 qla1280_print_settings(struct nvram *nv)
1928 nv->bus[0].config_1.initiator_id);
1930 nv->bus[1].config_1.initiator_id);
1933 nv->bus[0].bus_reset_delay);
1935 nv->bus[1].bus_reset_delay);
1937 dprintk(1, "qla1280 : retry count[0]=%d\n", nv->bus[0].retry_count);
1938 dprintk(1, "qla1280 : retry delay[0]=%d\n", nv->bus[0].retry_delay);
1939 dprintk(1, "qla1280 : retry count[1]=%d\n", nv->bus[1].retry_count);
1940 dprintk(1, "qla1280 : retry delay[1]=%d\n", nv->bus[1].retry_delay);
1943 nv->bus[0].config_2.async_data_setup_time);
1945 nv->bus[1].config_2.async_data_setup_time);
1948 nv->bus[0].config_2.req_ack_active_negation);
1950 nv->bus[1].config_2.req_ack_active_negation);
1953 nv->bus[0].config_2.data_line_active_negation);
1955 nv->bus[1].config_2.data_line_active_negation);
1958 nv->cntr_flags_1.disable_loading_risc_code);
1961 nv->cntr_flags_1.enable_64bit_addressing);
1964 nv->bus[0].selection_timeout);
1966 nv->bus[1].selection_timeout);
1969 nv->bus[0].max_queue_depth);
1971 nv->bus[1].max_queue_depth);
1977 struct nvram *nv = &ha->nvram;
1979 nv->bus[bus].target[target].parameter.renegotiate_on_error = 1;
1980 nv->bus[bus].target[target].parameter.auto_request_sense = 1;
1981 nv->bus[bus].target[target].parameter.tag_queuing = 1;
1982 nv->bus[bus].target[target].parameter.enable_sync = 1;
1984 nv->bus[bus].target[target].parameter.enable_wide = 1;
1986 nv->bus[bus].target[target].execution_throttle =
1987 nv->bus[bus].max_queue_depth - 1;
1988 nv->bus[bus].target[target].parameter.parity_checking = 1;
1989 nv->bus[bus].target[target].parameter.disconnect_allowed = 1;
1992 nv->bus[bus].target[target].flags.flags1x160.device_enable = 1;
1993 nv->bus[bus].target[target].flags.flags1x160.sync_offset = 0x0e;
1994 nv->bus[bus].target[target].sync_period = 9;
1995 nv->bus[bus].target[target].ppr_1x160.flags.enable_ppr = 1;
1996 nv->bus[bus].target[target].ppr_1x160.flags.ppr_options = 2;
1997 nv->bus[bus].target[target].ppr_1x160.flags.ppr_bus_width = 1;
1999 nv->bus[bus].target[target].flags.flags1x80.device_enable = 1;
2000 nv->bus[bus].target[target].flags.flags1x80.sync_offset = 12;
2001 nv->bus[bus].target[target].sync_period = 10;
2008 struct nvram *nv = &ha->nvram;
2012 memset(nv, 0, sizeof(struct nvram));
2014 /* nv->cntr_flags_1.disable_loading_risc_code = 1; */
2015 nv->firmware_feature.f.enable_fast_posting = 1;
2016 nv->firmware_feature.f.disable_synchronous_backoff = 1;
2017 nv->termination.scsi_bus_0_control = 3;
2018 nv->termination.scsi_bus_1_control = 3;
2019 nv->termination.auto_term_support = 1;
2029 nv->isp_config.burst_enable = 1;
2031 nv->isp_config.fifo_threshold |= 3;
2033 nv->isp_config.fifo_threshold |= 4;
2036 nv->isp_parameter = 0x01; /* fast memory enable */
2039 nv->bus[bus].config_1.initiator_id = 7;
2040 nv->bus[bus].config_2.req_ack_active_negation = 1;
2041 nv->bus[bus].config_2.data_line_active_negation = 1;
2042 nv->bus[bus].selection_timeout = 250;
2043 nv->bus[bus].max_queue_depth = 32;
2046 nv->bus[bus].bus_reset_delay = 3;
2047 nv->bus[bus].config_2.async_data_setup_time = 6;
2048 nv->bus[bus].retry_delay = 1;
2050 nv->bus[bus].bus_reset_delay = 5;
2051 nv->bus[bus].config_2.async_data_setup_time = 8;
2062 struct nvram *nv = &ha->nvram;
2080 mb[3] = nv->bus[bus].target[target].flags.flags1x160.sync_offset << 8;
2082 mb[3] = nv->bus[bus].target[target].flags.flags1x80.sync_offset << 8;
2083 mb[3] |= nv->bus[bus].target[target].sync_period;
2088 if (nv->bus[bus].target[target].parameter.tag_queuing)
2093 if (nv->bus[bus].target[target].flags.flags1x160.device_enable)
2097 if (nv->bus[bus].target[target].flags.flags1x80.device_enable)
2100 if (nv->bus[bus].target[target].flags.flags1x80.lun_disable)
2109 mb[2] = nv->bus[bus].max_queue_depth;
2110 mb[3] = nv->bus[bus].target[target].execution_throttle;
2120 struct nvram *nv = &ha->nvram;
2126 nv->bus[bus].config_1.scsi_reset_disable;
2129 ha->bus_settings[bus].id = nv->bus[bus].config_1.initiator_id;
2137 nv->bus[bus].bus_reset_delay;
2140 ha->bus_settings[bus].hiwat = nv->bus[bus].max_queue_depth - 1;
2153 struct nvram *nv = &ha->nvram;
2163 nv->bus[bus].target[target].parameter.
2170 qla1280_print_settings(nv);
2174 nv->cntr_flags_1.disable_loading_risc_code;
2186 cfg1 |= nv->isp_config.fifo_threshold << 4;
2188 cfg1 |= nv->isp_config.burst_enable << 2;
2197 cfg1 = nv->isp_config.fifo_threshold << 4;
2198 cfg1 |= nv->isp_config.burst_enable << 2;
2207 term = nv->termination.scsi_bus_1_control;
2208 term |= nv->termination.scsi_bus_0_control << 2;
2209 term |= nv->termination.auto_term_support << 7;
2217 mb[1] = nv->isp_parameter;
2229 mb[1] = nv->firmware_feature.f.enable_fast_posting;
2230 mb[1] |= nv->firmware_feature.f.report_lvd_bus_transition << 1;
2231 mb[1] |= nv->firmware_feature.f.disable_synchronous_backoff << 5;
2236 mb[1] = nv->bus[0].retry_count;
2237 mb[2] = nv->bus[0].retry_delay;
2238 mb[6] = nv->bus[1].retry_count;
2239 mb[7] = nv->bus[1].retry_delay;
2245 mb[1] = nv->bus[0].config_2.async_data_setup_time;
2246 mb[2] = nv->bus[1].config_2.async_data_setup_time;
2252 if (nv->bus[0].config_2.req_ack_active_negation)
2254 if (nv->bus[0].config_2.data_line_active_negation)
2257 if (nv->bus[1].config_2.req_ack_active_negation)
2259 if (nv->bus[1].config_2.data_line_active_negation)
2279 mb[1] = nv->bus[0].selection_timeout;
2280 mb[2] = nv->bus[1].selection_timeout;