Lines Matching refs:data
364 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
365 int pos = data->msgout_len;
373 data->msgoutbuf[pos] = IDENTIFY(mode, SCpnt->device->lun); pos++;
375 data->msgout_len = pos;
385 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
386 int pos = data->msgout_len;
388 data->msgoutbuf[pos] = EXTENDED_MESSAGE; pos++;
389 data->msgoutbuf[pos] = EXTENDED_SDTR_LEN; pos++;
390 data->msgoutbuf[pos] = EXTENDED_SDTR; pos++;
391 data->msgoutbuf[pos] = period; pos++;
392 data->msgoutbuf[pos] = offset; pos++;
394 data->msgout_len = pos;
402 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
403 int pos = data->msgout_len;
411 data->msgoutbuf[pos] = NOP; pos++;
412 data->msgout_len = pos;
420 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
421 int pos = data->msgout_len;
423 data->msgoutbuf[pos] = MESSAGE_REJECT; pos++;
424 data->msgout_len = pos;
451 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
455 nsp32_autoparam *param = data->autoparam;
480 if (data->msgout_len == 0) {
484 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
486 for (i = 0; i < data->msgout_len; i++) {
494 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
497 msgout |= (unsigned int)data->msgout_len; /* len */
499 /* data->msgout_len > 3 */
521 param->syncreg = data->cur_target->syncreg;
522 param->ackwidth = data->cur_target->ackwidth;
524 param->sample_reg = data->cur_target->sample_reg;
526 // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
538 switch (data->trans_method) {
560 param->sgt_pointer = cpu_to_le32(data->cur_lunt->sglun_paddr);
565 nsp32_write4(base, SGT_ADR, data->auto_paddr);
583 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
641 if (data->msgout_len == 0) {
646 } else if (data->msgout_len > 0 && data->msgout_len <= 3) {
648 for (i = 0; i < data->msgout_len; i++) {
656 msgout |= ((unsigned int)(data->msgoutbuf[i]) << 24);
659 msgout |= (unsigned int)data->msgout_len; /* len */
662 /* data->msgout_len > 3 */
677 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
688 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
693 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
701 data->msgout_len, msgout);
706 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
713 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
717 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
719 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
808 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
834 if (newid >= ARRAY_SIZE(data->lunt) ||
835 newlun >= ARRAY_SIZE(data->lunt[0])) {
838 } else if(data->lunt[newid][newlun].SCpnt == NULL) {
843 data->cur_id = newid;
844 data->cur_lun = newlun;
845 data->cur_target = &(data->target[newid]);
846 data->cur_lunt = &(data->lunt[newid][newlun]);
856 * nsp32_setup_sg_table - build scatter gather list for transfer data
863 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
865 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
911 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
923 if (data->CurrentSC != NULL) {
925 data->CurrentSC = NULL;
949 data->CurrentSC = SCpnt;
953 /* initialize data */
954 data->msgout_len = 0;
955 data->msgin_len = 0;
956 cur_lunt = &(data->lunt[SCpnt->device->id][SCpnt->device->lun]);
960 data->cur_lunt = cur_lunt;
961 data->cur_id = SCpnt->device->id;
962 data->cur_lun = SCpnt->device->lun;
980 target = &data->target[scmd_id(SCpnt)];
981 data->cur_target = target;
987 nsp32_set_max_sync(data, target, &period, &offset);
991 nsp32_set_async(data, target);
1004 nsp32_set_async(data, target);
1016 nsp32_set_async(data, target);
1047 static int nsp32hw_init(nsp32_hw_data *data)
1049 unsigned int base = data->BaseAddress;
1074 if ((data->trans_method & NSP32_TRANSFER_PIO) ||
1075 (data->trans_method & NSP32_TRANSFER_MMIO)) {
1078 } else if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1089 nsp32_index_write1(base, CLOCK_DIV, data->clock);
1158 nsp32_hw_data *data = dev_id;
1159 unsigned int base = data->BaseAddress;
1160 struct scsi_cmnd *SCpnt = data->CurrentSC;
1166 struct Scsi_Host *host = data->Host;
1191 if (data->CurrentSC != NULL) {
1209 nsp32_do_bus_reset(data);
1254 (data->msgout_len <= 3)) {
1259 data->msgout_len = 0;
1287 scsi_set_resid(SCpnt, 0); /* all data transferred! */
1335 nsp32_sack_assert(data);
1336 nsp32_wait_req(data, NEGATE);
1337 nsp32_sack_negate(data);
1446 nsp32_hw_data *data;
1454 data = (nsp32_hw_data *)host->hostdata;
1465 host->base, host->base + data->MmioLength - 1);
1472 model = data->pci_devid->driver_data;
1481 spin_lock_irqsave(&(data->Lock), flags);
1482 seq_printf(m, "CurrentSC: 0x%p\n\n", data->CurrentSC);
1483 spin_unlock_irqrestore(&(data->Lock), flags);
1487 for (id = 0; id < ARRAY_SIZE(data->target); id++) {
1496 if (data->target[id].sync_flag == SDTR_DONE) {
1497 if (data->target[id].period == 0 &&
1498 data->target[id].offset == ASYNC_OFFSET ) {
1507 if (data->target[id].period != 0) {
1509 speed = 1000000 / (data->target[id].period * 4);
1514 data->target[id].offset
1525 * Reset parameters and call scsi_done for data->cur_lunt.
1530 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1549 data->cur_lunt->SCpnt = NULL;
1550 data->cur_lunt = NULL;
1551 data->cur_target = NULL;
1552 data->CurrentSC = NULL;
1568 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1585 * processing and we can't adjust any SCSI data pointer in next data
1607 * come after data transferring.
1622 data->cur_lunt->msgin03 = FALSE;
1624 data->cur_lunt->msgin03 = TRUE;
1632 //data->cur_lunt->save_datp = data->cur_datp;
1646 if (data->cur_target->sync_flag & SDTR_INITIATOR) {
1651 nsp32_set_async(data, data->cur_target);
1652 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
1653 data->cur_target->sync_flag |= SDTR_DONE;
1654 } else if (data->cur_target->sync_flag & SDTR_TARGET) {
1670 nsp32_set_async(data, data->cur_target);
1672 data->cur_target->sync_flag &= ~SDTR_TARGET;
1673 data->cur_target->sync_flag |= SDTR_DONE;
1721 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1722 int old_entry = data->cur_entry;
1724 int sg_num = data->cur_lunt->sg_num;
1725 nsp32_sgtable *sgt = data->cur_lunt->sglun->sgt;
1770 data->cur_entry = new_entry;
1796 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1801 "enter: msgout_len: 0x%x", data->msgout_len);
1807 if (data->msgout_len == 0) {
1814 for (i = 0; i < data->msgout_len; i++) {
1816 "%d : 0x%x", i, data->msgoutbuf[i]);
1821 nsp32_wait_req(data, ASSERT);
1823 if (i == (data->msgout_len - 1)) {
1839 * Write data with SACK, then wait sack is
1842 nsp32_write1(base, SCSI_DATA_WITH_ACK, data->msgoutbuf[i]);
1843 nsp32_wait_sack(data, NEGATE);
1849 data->msgout_len = 0;
1862 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1863 unsigned int base = data->BaseAddress;
1868 if (data->cur_target == NULL || data->cur_lunt == NULL) {
1876 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
1881 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
1886 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
1891 nsp32_write4(base, SGT_ADR, data->cur_lunt->sglun_paddr);
1898 if (data->trans_method & NSP32_TRANSFER_BUSMASTER) {
1902 } else if (data->trans_method & NSP32_TRANSFER_MMIO) {
1904 } else if (data->trans_method & NSP32_TRANSFER_PIO) {
1930 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
1946 data->msginbuf[(unsigned char)data->msgin_len] = msg;
1947 msgtype = data->msginbuf[0];
1950 data->msgin_len, msg, msgtype);
1959 nsp32_sack_assert(data);
2013 data->cur_lunt->msgin03 = FALSE;
2023 new_sgtp = data->cur_lunt->sglun_paddr +
2024 (data->cur_lunt->cur_entry * sizeof(nsp32_sgtable));
2042 if (data->cur_target->sync_flag &
2049 nsp32_set_async(data, data->cur_target);
2050 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
2051 data->cur_target->sync_flag |= SDTR_DONE;
2078 if (data->msgin_len >= 1) {
2091 if (data->msgin_len < 1) {
2100 if ((data->msginbuf[1] + 1) > data->msgin_len) {
2115 switch (data->msginbuf[2]) {
2125 if (data->msgin_len != EXTENDED_SDTR_LEN + 1) {
2159 data->msgin_len = 0;
2168 if (data->msgout_len > 0) {
2182 if (data->cur_lunt->msgin03 == TRUE) {
2185 data->cur_lunt->msgin03 = FALSE;
2187 data->msgin_len++;
2198 nsp32_wait_req(data, NEGATE);
2203 nsp32_sack_negate(data);
2213 msg, data->msgin_len, msgtype);
2215 data->msgin_len = 0;
2225 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2226 nsp32_target *target = data->cur_target;
2227 unsigned char get_period = data->msginbuf[3];
2228 unsigned char get_offset = data->msginbuf[4];
2279 if (get_period < data->synct[0].period_num) {
2287 entry = nsp32_search_period_entry(data, target, get_period);
2300 nsp32_set_sync_entry(data, target, entry, get_offset);
2314 if (get_period < data->synct[0].period_num) {
2315 get_period = data->synct[0].period_num;
2318 entry = nsp32_search_period_entry(data, target, get_period);
2321 nsp32_set_async(data, target);
2324 nsp32_set_sync_entry(data, target, entry, get_offset);
2341 nsp32_set_async(data, target); /* set as ASYNC transfer mode */
2353 static int nsp32_search_period_entry(nsp32_hw_data *data,
2359 if (target->limit_entry >= data->syncnum) {
2364 for (i = target->limit_entry; i < data->syncnum; i++) {
2365 if (period >= data->synct[i].start_period &&
2366 period <= data->synct[i].end_period) {
2375 if (i == data->syncnum) {
2386 static void nsp32_set_async(nsp32_hw_data *data, nsp32_target *target)
2388 unsigned char period = data->synct[target->limit_entry].period_num;
2403 static void nsp32_set_max_sync(nsp32_hw_data *data,
2410 period_num = data->synct[target->limit_entry].period_num;
2411 *period = data->synct[target->limit_entry].start_period;
2412 ackwidth = data->synct[target->limit_entry].ackwidth;
2425 static void nsp32_set_sync_entry(nsp32_hw_data *data,
2432 period = data->synct[entry].period_num;
2433 ackwidth = data->synct[entry].ackwidth;
2434 sample_rate = data->synct[entry].sample_rate;
2453 static void nsp32_wait_req(nsp32_hw_data *data, int state)
2455 unsigned int base = data->BaseAddress;
2482 static void nsp32_wait_sack(nsp32_hw_data *data, int state)
2484 unsigned int base = data->BaseAddress;
2513 static void nsp32_sack_assert(nsp32_hw_data *data)
2515 unsigned int base = data->BaseAddress;
2526 static void nsp32_sack_negate(nsp32_hw_data *data)
2528 unsigned int base = data->BaseAddress;
2549 nsp32_hw_data *data;
2567 data = (nsp32_hw_data *)host->hostdata;
2569 memcpy(data, &nsp32_data_base, sizeof(nsp32_hw_data));
2571 host->irq = data->IrqNumber;
2572 host->io_port = data->BaseAddress;
2573 host->unique_id = data->BaseAddress;
2574 host->n_io_port = data->NumAddress;
2575 host->base = (unsigned long)data->MmioAddress;
2577 data->Host = host;
2578 spin_lock_init(&(data->Lock));
2580 data->cur_lunt = NULL;
2581 data->cur_target = NULL;
2586 data->trans_method = NSP32_TRANSFER_BUSMASTER;
2593 data->clock = CLOCK_4;
2598 switch (data->clock) {
2600 /* If data->clock is CLOCK_4, then select 40M sync table. */
2601 data->synct = nsp32_sync_table_40M;
2602 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2605 /* If data->clock is CLOCK_2, then select 20M sync table. */
2606 data->synct = nsp32_sync_table_20M;
2607 data->syncnum = ARRAY_SIZE(nsp32_sync_table_20M);
2610 /* If data->clock is PCICLK, then select pci sync table. */
2611 data->synct = nsp32_sync_table_pci;
2612 data->syncnum = ARRAY_SIZE(nsp32_sync_table_pci);
2618 data->clock = CLOCK_4;
2619 data->synct = nsp32_sync_table_40M;
2620 data->syncnum = ARRAY_SIZE(nsp32_sync_table_40M);
2638 data->autoparam = dma_alloc_coherent(&pdev->dev,
2639 sizeof(nsp32_autoparam), &(data->auto_paddr),
2641 if (data->autoparam == NULL) {
2649 data->sg_list = dma_alloc_coherent(&pdev->dev, NSP32_SG_TABLE_SIZE,
2650 &data->sg_paddr, GFP_KERNEL);
2651 if (data->sg_list == NULL) {
2656 for (i = 0; i < ARRAY_SIZE(data->lunt); i++) {
2657 for (j = 0; j < ARRAY_SIZE(data->lunt[0]); j++) {
2658 int offset = i * ARRAY_SIZE(data->lunt[0]) + j;
2665 .sglun = &(data->sg_list[offset]),
2666 .sglun_paddr = data->sg_paddr + (offset * sizeof(nsp32_sglun)),
2669 data->lunt[i][j] = tmp;
2676 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2677 nsp32_target *target = &(data->target[i]);
2681 nsp32_set_async(data, target);
2687 ret = nsp32_getprom_param(data);
2689 data->resettime = 3; /* default 3 */
2695 nsp32hw_init(data);
2697 snprintf(data->info_str, sizeof(data->info_str),
2719 nsp32_do_bus_reset(data);
2721 ret = request_irq(host->irq, do_nsp32_isr, IRQF_SHARED, "nsp32", data);
2735 data->BaseAddress, data->NumAddress);
2752 free_irq(host->irq, data);
2756 data->sg_list, data->sg_paddr);
2760 data->autoparam, data->auto_paddr);
2771 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2773 if (data->autoparam) {
2774 dma_free_coherent(&data->Pci->dev, sizeof(nsp32_autoparam),
2775 data->autoparam, data->auto_paddr);
2778 if (data->sg_list) {
2779 dma_free_coherent(&data->Pci->dev, NSP32_SG_TABLE_SIZE,
2780 data->sg_list, data->sg_paddr);
2784 free_irq(host->irq, data);
2791 if (data->MmioAddress) {
2792 iounmap(data->MmioAddress);
2800 nsp32_hw_data *data = (nsp32_hw_data *)shpnt->hostdata;
2802 return data->info_str;
2811 nsp32_hw_data *data = (nsp32_hw_data *)SCpnt->device->host->hostdata;
2816 if (data->cur_lunt->SCpnt == NULL) {
2821 if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
2823 data->cur_target->sync_flag = 0;
2824 nsp32_set_async(data, data->cur_target);
2837 static void nsp32_do_bus_reset(nsp32_hw_data *data)
2839 unsigned int base = data->BaseAddress;
2858 for (i = 0; i < ARRAY_SIZE(data->target); i++) {
2859 nsp32_target *target = &data->target[i];
2862 nsp32_set_async(data, target);
2876 data->CurrentSC = NULL;
2883 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
2890 nsp32hw_init(data);
2892 nsp32_do_bus_reset(data);
2907 static int nsp32_getprom_param(nsp32_hw_data *data)
2909 int vendor = data->pci_devid->vendor;
2910 int device = data->pci_devid->device;
2917 ret = nsp32_prom_read(data, 0x7e);
2922 ret = nsp32_prom_read(data, 0x7f);
2933 ret = nsp32_getprom_c16(data);
2936 ret = nsp32_getprom_at24(data);
2939 ret = nsp32_getprom_at24(data);
2945 /* for debug : SPROM data full checking */
2947 val = nsp32_prom_read(data, i);
2957 * AT24C01A (Logitec: LHA-600S), AT24C02 (Melco Buffalo: IFC-USLP) data map:
2983 static int nsp32_getprom_at24(nsp32_hw_data *data)
2995 data->resettime = nsp32_prom_read(data, 0x12);
3010 ret = nsp32_prom_read(data, 0x07);
3032 target = &data->target[i];
3036 ret = nsp32_prom_read(data, i);
3037 entry = nsp32_search_period_entry(data, target, ret);
3051 * C16 110 (I-O Data: SC-NBD) data map:
3070 static int nsp32_getprom_c16(nsp32_hw_data *data)
3081 data->resettime = nsp32_prom_read(data, 0x11);
3087 target = &data->target[i];
3088 ret = nsp32_prom_read(data, i);
3106 entry = nsp32_search_period_entry(data, target, val);
3121 static int nsp32_prom_read(nsp32_hw_data *data, int romaddr)
3126 nsp32_prom_start(data);
3129 nsp32_prom_write_bit(data, 1); /* 1 */
3130 nsp32_prom_write_bit(data, 0); /* 0 */
3131 nsp32_prom_write_bit(data, 1); /* 1 */
3132 nsp32_prom_write_bit(data, 0); /* 0 */
3133 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
3134 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
3135 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
3138 nsp32_prom_write_bit(data, 0);
3141 nsp32_prom_write_bit(data, 0);
3145 nsp32_prom_write_bit(data, ((romaddr >> i) & 1));
3149 nsp32_prom_write_bit(data, 0);
3152 nsp32_prom_start(data);
3155 nsp32_prom_write_bit(data, 1); /* 1 */
3156 nsp32_prom_write_bit(data, 0); /* 0 */
3157 nsp32_prom_write_bit(data, 1); /* 1 */
3158 nsp32_prom_write_bit(data, 0); /* 0 */
3159 nsp32_prom_write_bit(data, 0); /* A2: 0 (GND) */
3160 nsp32_prom_write_bit(data, 0); /* A1: 0 (GND) */
3161 nsp32_prom_write_bit(data, 0); /* A0: 0 (GND) */
3164 nsp32_prom_write_bit(data, 1);
3167 nsp32_prom_write_bit(data, 0);
3169 /* data... */
3172 val += (nsp32_prom_read_bit(data) << i);
3176 nsp32_prom_write_bit(data, 1);
3179 nsp32_prom_stop(data);
3184 static void nsp32_prom_set(nsp32_hw_data *data, int bit, int val)
3186 int base = data->BaseAddress;
3202 static int nsp32_prom_get(nsp32_hw_data *data, int bit)
3204 int base = data->BaseAddress;
3226 static void nsp32_prom_start (nsp32_hw_data *data)
3229 nsp32_prom_set(data, SCL, 1);
3230 nsp32_prom_set(data, SDA, 1);
3231 nsp32_prom_set(data, ENA, 1); /* output mode */
3232 nsp32_prom_set(data, SDA, 0); /* keeping SCL=1 and transiting
3234 nsp32_prom_set(data, SCL, 0);
3237 static void nsp32_prom_stop (nsp32_hw_data *data)
3240 nsp32_prom_set(data, SCL, 1);
3241 nsp32_prom_set(data, SDA, 0);
3242 nsp32_prom_set(data, ENA, 1); /* output mode */
3243 nsp32_prom_set(data, SDA, 1);
3244 nsp32_prom_set(data, SCL, 0);
3247 static void nsp32_prom_write_bit(nsp32_hw_data *data, int val)
3250 nsp32_prom_set(data, SDA, val);
3251 nsp32_prom_set(data, SCL, 1 );
3252 nsp32_prom_set(data, SCL, 0 );
3255 static int nsp32_prom_read_bit(nsp32_hw_data *data)
3260 nsp32_prom_set(data, ENA, 0); /* input mode */
3261 nsp32_prom_set(data, SCL, 1);
3263 val = nsp32_prom_get(data, SDA);
3265 nsp32_prom_set(data, SCL, 0);
3266 nsp32_prom_set(data, ENA, 1); /* output mode */
3296 nsp32_hw_data *data = (nsp32_hw_data *)host->hostdata;
3306 reg = nsp32_read2(data->BaseAddress, INDEX_REG);
3308 nsp32_msg(KERN_INFO, "io=0x%x reg=0x%x", data->BaseAddress, reg);
3315 nsp32hw_init (data);
3316 nsp32_do_bus_reset(data);
3331 nsp32_hw_data *data = &nsp32_data_base;
3341 data->Pci = pdev;
3342 data->pci_devid = id;
3343 data->IrqNumber = pdev->irq;
3344 data->BaseAddress = pci_resource_start(pdev, 0);
3345 data->NumAddress = pci_resource_len (pdev, 0);
3346 data->MmioAddress = pci_ioremap_bar(pdev, 1);
3347 data->MmioLength = pci_resource_len (pdev, 1);
3355 data->MmioAddress, data->MmioLength,