Lines Matching refs:cur_target
521 param->syncreg = data->cur_target->syncreg;
522 param->ackwidth = data->cur_target->ackwidth;
524 param->sample_reg = data->cur_target->sample_reg;
526 // nsp32_dbg(NSP32_DEBUG_AUTOSCSI, "sample rate=0x%x\n", data->cur_target->sample_reg);
677 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
688 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
693 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
845 data->cur_target = &(data->target[newid]);
981 data->cur_target = target;
1551 data->cur_target = NULL;
1646 if (data->cur_target->sync_flag & SDTR_INITIATOR) {
1651 nsp32_set_async(data, data->cur_target);
1652 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
1653 data->cur_target->sync_flag |= SDTR_DONE;
1654 } else if (data->cur_target->sync_flag & SDTR_TARGET) {
1670 nsp32_set_async(data, data->cur_target);
1672 data->cur_target->sync_flag &= ~SDTR_TARGET;
1673 data->cur_target->sync_flag |= SDTR_DONE;
1868 if (data->cur_target == NULL || data->cur_lunt == NULL) {
1876 nsp32_write1(base, SYNC_REG, data->cur_target->syncreg);
1881 nsp32_write1(base, ACK_WIDTH, data->cur_target->ackwidth);
1886 nsp32_write1(base, SREQ_SMPL_RATE, data->cur_target->sample_reg);
2042 if (data->cur_target->sync_flag &
2049 nsp32_set_async(data, data->cur_target);
2050 data->cur_target->sync_flag &= ~SDTR_INITIATOR;
2051 data->cur_target->sync_flag |= SDTR_DONE;
2226 nsp32_target *target = data->cur_target;
2581 data->cur_target = NULL;
2821 if (data->cur_target->sync_flag & (SDTR_INITIATOR | SDTR_TARGET)) {
2823 data->cur_target->sync_flag = 0;
2824 nsp32_set_async(data, data->cur_target);