Lines Matching defs:addr
142 _base_readl_ext_retry(const void __iomem *addr);
201 * @addr: MPT Fusion system interface register address
207 _base_readl_aero(const void __iomem *addr)
212 ret_val = readl(addr);
220 _base_readl_ext_retry(const void __iomem *addr)
225 ret_val = readl(addr);
234 _base_readl(const void __iomem *addr)
236 return readl(addr);
244 * @reply: reply message frame(lower 32bit addr)
1392 * @reply: reply message frame (lower 32bit addr)
1432 * @reply: reply message frame(lower 32bit addr)
1466 * @reply: reply message frame(lower 32bit addr)
3773 * mpt3sas_base_get_sense_buffer - obtain a sense buffer virt addr
3786 * mpt3sas_base_get_sense_buffer_dma - obtain a sense buffer dma addr
3800 * mpt3sas_base_get_pcie_sgl - obtain a PCIe SGL virt addr
3813 * mpt3sas_base_get_pcie_sgl_dma - obtain a PCIe SGL dma addr
3828 * @phys_addr: lower 32 physical addr of the reply
3830 * Converts 32bit lower physical addr into a virt address.
4071 * @addr: address in MMIO space
4079 _base_mpi_ep_writeq(__u64 b, volatile void __iomem *addr,
4085 __raw_writel((u32)(b), addr);
4086 __raw_writel((u32)(b >> 32), (addr + 4));
4093 * @addr: address in MMIO space
4102 _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock)
4105 __raw_writeq(b, addr);
4110 _base_writeq(__u64 b, volatile void __iomem *addr, spinlock_t *writeq_lock)
4112 _base_mpi_ep_writeq(b, addr, writeq_lock);
5504 __be64 addr;
5518 addr = *((__be64 *) nvram->SasAddr);
5519 sas_addr->q = cpu_to_le64(be64_to_cpu(addr));
7609 * @reply: reply message frame(lower 32bit addr)