Lines Matching refs:dev_spec
1012 if ((tgtdev->dev_spec.pcie_inf.dev_info &
1016 tgtdev->dev_spec.pcie_inf.mdts / 512);
1017 if (tgtdev->dev_spec.pcie_inf.pgsz == 0)
1022 ((1 << tgtdev->dev_spec.pcie_inf.pgsz) - 1));
1180 tgtdev->dev_spec.sas_sata_inf.dev_info = dev_info;
1181 tgtdev->dev_spec.sas_sata_inf.sas_address =
1183 tgtdev->dev_spec.sas_sata_inf.phy_id = sasinf->phy_num;
1184 tgtdev->dev_spec.sas_sata_inf.attached_phy_id =
1199 if (tgtdev->dev_spec.sas_sata_inf.hba_port)
1200 tgtdev->dev_spec.sas_sata_inf.hba_port->port_id =
1210 tgtdev->dev_spec.pcie_inf.dev_info = dev_info;
1211 tgtdev->dev_spec.pcie_inf.capb =
1213 tgtdev->dev_spec.pcie_inf.mdts = MPI3MR_DEFAULT_MDTS;
1215 tgtdev->dev_spec.pcie_inf.pgsz = 12;
1217 tgtdev->dev_spec.pcie_inf.mdts =
1219 tgtdev->dev_spec.pcie_inf.pgsz = pcieinf->page_size;
1220 tgtdev->dev_spec.pcie_inf.reset_to =
1223 tgtdev->dev_spec.pcie_inf.abort_to =
1227 if (tgtdev->dev_spec.pcie_inf.mdts > (1024 * 1024))
1228 tgtdev->dev_spec.pcie_inf.mdts = (1024 * 1024);
1255 tgtdev->dev_spec.vd_inf.state = vdinf->vd_state;
1259 tgtdev->dev_spec.vd_inf.tg_id = vdinf_io_throttle_group;
1260 tgtdev->dev_spec.vd_inf.tg_high =
1262 tgtdev->dev_spec.vd_inf.tg_low =
1267 tg->high = tgtdev->dev_spec.vd_inf.tg_high;
1268 tg->low = tgtdev->dev_spec.vd_inf.tg_low;
1270 tgtdev->dev_spec.vd_inf.tg_qd_reduction;
1275 tgtdev->dev_spec.vd_inf.tg = tg;
3710 if (cmd_priv && tgtdev->dev_spec.pcie_inf.abort_to)
3711 timeout = tgtdev->dev_spec.pcie_inf.abort_to;
3712 else if (!cmd_priv && tgtdev->dev_spec.pcie_inf.reset_to)
3713 timeout = tgtdev->dev_spec.pcie_inf.reset_to;
4420 if ((tgt_dev->dev_spec.pcie_inf.dev_info &
4424 tgt_dev->dev_spec.pcie_inf.mdts / 512);
4425 if (tgt_dev->dev_spec.pcie_inf.pgsz == 0)
4430 ((1 << tgt_dev->dev_spec.pcie_inf.pgsz) - 1));
4539 ((tgt_dev->dev_spec.pcie_inf.dev_info &
4542 ((tgt_dev->dev_spec.pcie_inf.dev_info &
4549 scsi_tgt_priv_data->throttle_group = tgt_dev->dev_spec.vd_inf.tg;