Lines Matching refs:ras_fwlog
6845 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6848 ras_fwlog->state = INACTIVE;
6869 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6872 if (!list_empty(&ras_fwlog->fwlog_buff_list)) {
6874 &ras_fwlog->fwlog_buff_list,
6884 if (ras_fwlog->lwpd.virt) {
6887 ras_fwlog->lwpd.virt,
6888 ras_fwlog->lwpd.phys);
6889 ras_fwlog->lwpd.virt = NULL;
6893 ras_fwlog->state = INACTIVE;
6912 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6917 INIT_LIST_HEAD(&ras_fwlog->fwlog_buff_list);
6920 ras_fwlog->lwpd.virt = dma_alloc_coherent(&phba->pcidev->dev,
6922 &ras_fwlog->lwpd.phys,
6924 if (!ras_fwlog->lwpd.virt) {
6931 ras_fwlog->fw_buffcount = fwlog_buff_count;
6932 for (i = 0; i < ras_fwlog->fw_buffcount; i++) {
6953 list_add_tail(&dmabuf->list, &ras_fwlog->fwlog_buff_list);
6976 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
6981 &pmb->u.mqe.un.ras_fwlog.header.cfg_shdr;
6992 ras_fwlog->ras_hwsupport = false;
6997 ras_fwlog->state = ACTIVE;
7023 struct lpfc_ras_fwlog *ras_fwlog = &phba->ras_fwlog;
7031 ras_fwlog->state = INACTIVE;
7042 if (!ras_fwlog->lwpd.virt) {
7060 ras_fwlog->fw_loglevel = fwlog_level;
7068 mbx_fwlog = (struct lpfc_mbx_set_ras_fwlog *)&mbox->u.mqe.un.ras_fwlog;
7072 ras_fwlog->fw_loglevel);
7074 ras_fwlog->fw_buffcount);
7079 list_for_each_entry(dmabuf, &ras_fwlog->fwlog_buff_list, list) {
7090 mbx_fwlog->u.request.lwpd.addr_lo = putPaddrLow(ras_fwlog->lwpd.phys);
7091 mbx_fwlog->u.request.lwpd.addr_hi = putPaddrHigh(ras_fwlog->lwpd.phys);
7094 ras_fwlog->state = REG_INPROGRESS;