Lines Matching refs:sli4_hba
376 phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_FABRIC) {
377 if (!(phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG))
378 phba->sli4_hba.fawwpn_flag &=
388 phba->sli4_hba.fawwpn_flag);
702 phba->sli4_hba.pc_sli4_params.mi_cap =
707 phba->sli4_hba.pc_sli4_params.mi_ver =
710 phba->sli4_hba.pc_sli4_params.mi_ver = 0;
712 phba->sli4_hba.pc_sli4_params.cmf =
714 phba->sli4_hba.pc_sli4_params.pls =
931 while (!list_empty(&phba->sli4_hba.sp_queue_event)) {
934 list_remove_head(&phba->sli4_hba.sp_queue_event,
1035 list_for_each_entry(qp, &phba->sli4_hba.lpfc_wq_list, wq_list) {
1109 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
1111 &phba->sli4_hba.lpfc_abts_els_sgl_list, list)
1114 list_splice_init(&phba->sli4_hba.lpfc_abts_els_sgl_list,
1115 &phba->sli4_hba.lpfc_els_sgl_list);
1118 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
1126 qp = &phba->sli4_hba.hdwq[idx];
1149 spin_lock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1150 list_splice_init(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list,
1152 spin_unlock_irq(&phba->sli4_hba.abts_nvmet_buf_list_lock);
1309 hdwq = &phba->sli4_hba.hdwq[phba->sli4_hba.cpu_map[i].hdwq];
1316 idle_stat = &phba->sli4_hba.idle_stat[i];
1368 ena_delay = kcalloc(phba->sli4_hba.num_possible_cpu, sizeof(*ena_delay),
1375 eq = phba->sli4_hba.hba_eq_hdl[i].eq;
1385 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, i);
1398 eqi_new = per_cpu_ptr(phba->sli4_hba.eq_info,
1921 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
2015 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
2019 phba->sli4_hba.u.if_type0.UERRLOregaddr,
2022 phba->sli4_hba.u.if_type0.UEMASKLOregaddr,
2034 for (i = 0; i < phba->sli4_hba.ue_to_sr / 1000; i++) {
2035 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
2057 if (!lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
2082 phba->sli4_hba.u.if_type2.STATUSregaddr,
2088 readl(phba->sli4_hba.u.if_type2.STATUSregaddr));
2092 reg_err1 = readl(phba->sli4_hba.u.if_type2.ERR1regaddr);
2093 reg_err2 = readl(phba->sli4_hba.u.if_type2.ERR2regaddr);
2333 (phba->sli4_hba.pport_name_sta ==
2343 (phba->sli4_hba.pport_name_sta ==
3194 if (!phba->sli4_hba.pc_sli4_params.cmf)
3258 if (!phba->sli4_hba.pc_sli4_params.cmf ||
3453 qp = &phba->sli4_hba.hdwq[0];
3488 qp = &phba->sli4_hba.hdwq[0];
3527 phba->cfg_hdw_queue, phba->sli4_hba.num_present_cpu,
3528 phba->sli4_hba.io_xri_cnt);
3534 count_per_hwq = phba->sli4_hba.io_xri_cnt / hwq_count;
3549 qp = &phba->sli4_hba.hdwq[j];
3557 qp = &phba->sli4_hba.hdwq[i];
3620 qp = &phba->sli4_hba.hdwq[i];
3714 if (!phba->sli4_hba.max_cfg_param.vpi_used)
4018 qp = &phba->sli4_hba.hdwq[idx];
4079 if (els_xri_cnt > phba->sli4_hba.els_xri_cnt) {
4081 xri_cnt = els_xri_cnt - phba->sli4_hba.els_xri_cnt;
4084 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
4115 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
4117 &phba->sli4_hba.lpfc_els_sgl_list);
4118 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
4119 } else if (els_xri_cnt < phba->sli4_hba.els_xri_cnt) {
4121 xri_cnt = phba->sli4_hba.els_xri_cnt - els_xri_cnt;
4124 "%d to %d\n", phba->sli4_hba.els_xri_cnt,
4126 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
4127 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list,
4140 &phba->sli4_hba.lpfc_els_sgl_list);
4141 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
4146 phba->sli4_hba.els_xri_cnt = els_xri_cnt;
4152 &phba->sli4_hba.lpfc_els_sgl_list, list) {
4163 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4199 nvmet_xri_cnt = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4200 if (nvmet_xri_cnt > phba->sli4_hba.nvmet_xri_cnt) {
4202 xri_cnt = nvmet_xri_cnt - phba->sli4_hba.nvmet_xri_cnt;
4205 phba->sli4_hba.nvmet_xri_cnt, nvmet_xri_cnt);
4237 spin_lock(&phba->sli4_hba.sgl_list_lock);
4239 &phba->sli4_hba.lpfc_nvmet_sgl_list);
4240 spin_unlock(&phba->sli4_hba.sgl_list_lock);
4242 } else if (nvmet_xri_cnt < phba->sli4_hba.nvmet_xri_cnt) {
4244 xri_cnt = phba->sli4_hba.nvmet_xri_cnt - nvmet_xri_cnt;
4247 "%d to %d\n", phba->sli4_hba.nvmet_xri_cnt,
4250 spin_lock(&phba->sli4_hba.sgl_list_lock);
4251 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list,
4264 &phba->sli4_hba.lpfc_nvmet_sgl_list);
4265 spin_unlock(&phba->sli4_hba.sgl_list_lock);
4271 phba->sli4_hba.nvmet_xri_cnt = nvmet_xri_cnt;
4277 &phba->sli4_hba.lpfc_nvmet_sgl_list, list) {
4288 sglq_entry->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4308 qp = &phba->sli4_hba.hdwq[idx];
4367 qp = phba->sli4_hba.hdwq;
4376 qp = &phba->sli4_hba.hdwq[idx];
4419 io_xri_max = phba->sli4_hba.max_cfg_param.max_xri - els_xri_cnt;
4420 phba->sli4_hba.io_xri_max = io_xri_max;
4425 phba->sli4_hba.io_xri_cnt,
4426 phba->sli4_hba.io_xri_max,
4431 if (phba->sli4_hba.io_xri_cnt > phba->sli4_hba.io_xri_max) {
4433 io_xri_cnt = phba->sli4_hba.io_xri_cnt -
4434 phba->sli4_hba.io_xri_max;
4446 phba->sli4_hba.io_xri_cnt -= io_xri_cnt;
4452 phba->sli4_hba.io_xri_cnt = cnt;
4465 lpfc_ncmd->cur_iocbq.sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4500 phba->sli4_hba.io_xri_cnt = 0;
4565 pwqeq->sli4_xritag = phba->sli4_hba.xri_ids[lxri];
4575 phba->sli4_hba.io_xri_cnt++;
4792 phba->sli4_hba.pc_sli4_params.sge_supp_len-1;
5080 phba->sli4_hba.intr_enable = 0;
5300 if (phba->sli4_hba.link_state.logical_speed)
5302 phba->sli4_hba.link_state.logical_speed;
5304 link_speed = phba->sli4_hba.link_state.speed;
5444 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
5455 phba->sli4_hba.link_state.speed =
5458 phba->sli4_hba.link_state.duplex =
5460 phba->sli4_hba.link_state.status =
5462 phba->sli4_hba.link_state.type =
5464 phba->sli4_hba.link_state.number =
5466 phba->sli4_hba.link_state.fault =
5468 phba->sli4_hba.link_state.logical_speed =
5475 phba->sli4_hba.link_state.speed,
5476 phba->sli4_hba.link_state.topology,
5477 phba->sli4_hba.link_state.status,
5478 phba->sli4_hba.link_state.type,
5479 phba->sli4_hba.link_state.number,
5480 phba->sli4_hba.link_state.logical_speed,
5481 phba->sli4_hba.link_state.fault);
6135 phba->sli4_hba.link_state.speed =
6139 phba->sli4_hba.link_state.logical_speed =
6178 phba->sli4_hba.link_state.logical_speed / (cnt * 1000);
6186 phba->sli4_hba.link_state.speed,
6187 phba->sli4_hba.link_state.logical_speed,
6242 phba->sli4_hba.link_state.speed =
6245 phba->sli4_hba.link_state.duplex = LPFC_ASYNC_LINK_DUPLEX_FULL;
6246 phba->sli4_hba.link_state.topology =
6248 phba->sli4_hba.link_state.status =
6250 phba->sli4_hba.link_state.type =
6252 phba->sli4_hba.link_state.number =
6254 phba->sli4_hba.link_state.fault =
6256 phba->sli4_hba.link_state.link_status =
6263 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_LINK_UP &&
6264 phba->sli4_hba.link_state.status < LPFC_FC_LA_TYPE_ACTIVATE_FAIL) {
6267 phba->sli4_hba.link_state.logical_speed = 0;
6268 else if (!phba->sli4_hba.conf_trunk)
6269 phba->sli4_hba.link_state.logical_speed =
6277 phba->sli4_hba.link_state.speed,
6278 phba->sli4_hba.link_state.topology,
6279 phba->sli4_hba.link_state.status,
6280 phba->sli4_hba.link_state.type,
6281 phba->sli4_hba.link_state.number,
6282 phba->sli4_hba.link_state.logical_speed,
6283 phba->sli4_hba.link_state.fault,
6284 phba->sli4_hba.link_state.link_status);
6291 if (phba->sli4_hba.link_state.status >= LPFC_FC_LA_TYPE_ACTIVATE_FAIL) {
6292 switch (phba->sli4_hba.link_state.status) {
6295 phba->sli4_hba.link_state.status =
6306 phba->sli4_hba.link_state.status =
6337 phba->sli4_hba.els_wq->pring->flag |= LPFC_STOP_IOCB_EVENT;
6347 if (phba->sli4_hba.link_state.status != LPFC_FC_LA_TYPE_LINK_UP) {
6350 switch (phba->sli4_hba.link_state.status) {
6372 if (phba->sli4_hba.link_state.status ==
6468 switch (phba->sli4_hba.lnk_info.lnk_no) {
6498 phba->sli4_hba.lnk_info.lnk_no);
6503 if (phba->sli4_hba.lnk_info.optic_state == status)
6567 phba->sli4_hba.lnk_info.optic_state = status;
6590 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_FABRIC;
7004 prev_ll_spd = phba->sli4_hba.link_state.logical_speed;
7005 phba->sli4_hba.link_state.logical_speed =
7010 phba->sli4_hba.link_state.logical_speed);
7279 if (!phba->sli4_hba.pc_sli4_params.cmf) {
7319 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
7320 while (!list_empty(&phba->sli4_hba.sp_asynce_work_queue)) {
7321 list_remove_head(&phba->sli4_hba.sp_asynce_work_queue,
7323 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock,
7363 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
7365 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
7926 phba->sli4_hba.num_present_cpu = lpfc_present_cpu;
7927 phba->sli4_hba.num_possible_cpu = cpumask_last(cpu_possible_mask) + 1;
7928 phba->sli4_hba.curr_disp_cpu = 0;
8004 spin_lock_init(&phba->sli4_hba.abts_io_buf_list_lock);
8005 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_io_buf_list);
8009 spin_lock_init(&phba->sli4_hba.abts_nvmet_buf_list_lock);
8010 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
8011 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_io_wait_list);
8012 spin_lock_init(&phba->sli4_hba.t_active_list_lock);
8013 INIT_LIST_HEAD(&phba->sli4_hba.t_active_ctx_list);
8017 spin_lock_init(&phba->sli4_hba.sgl_list_lock);
8018 spin_lock_init(&phba->sli4_hba.nvmet_io_wait_lock);
8019 spin_lock_init(&phba->sli4_hba.asynce_list_lock);
8020 spin_lock_init(&phba->sli4_hba.els_xri_abrt_list_lock);
8027 INIT_LIST_HEAD(&phba->sli4_hba.sp_cqe_event_pool);
8029 INIT_LIST_HEAD(&phba->sli4_hba.sp_queue_event);
8031 INIT_LIST_HEAD(&phba->sli4_hba.sp_asynce_work_queue);
8033 INIT_LIST_HEAD(&phba->sli4_hba.sp_els_xri_aborted_work_queue);
8035 INIT_LIST_HEAD(&phba->sli4_hba.sp_unsol_work_queue);
8038 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_blk_list);
8039 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_xri_blk_list);
8040 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_vfi_blk_list);
8050 phba->sli4_hba.lnk_info.optic_state = 0xff;
8058 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) >=
8083 if (phba->sli4_hba.fawwpn_flag & LPFC_FAWWPN_CONFIG) {
8091 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_FABRIC;
8099 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
8135 phba->sli4_hba.wwnn.u.name = wwn;
8140 phba->sli4_hba.wwpn.u.name = wwn;
8166 phba->sli4_hba.num_present_cpu;
8168 phba->sli4_hba.num_present_cpu;
8186 &phba->sli4_hba.sli_intf);
8188 &phba->sli4_hba.sli_intf);
8189 if (phba->sli4_hba.extents_in_use &&
8190 phba->sli4_hba.rpi_hdrs_in_use) {
8380 phba->sli4_hba.hba_eq_hdl = kcalloc(phba->cfg_irq_chann,
8383 if (!phba->sli4_hba.hba_eq_hdl) {
8391 phba->sli4_hba.cpu_map = kcalloc(phba->sli4_hba.num_possible_cpu,
8394 if (!phba->sli4_hba.cpu_map) {
8402 phba->sli4_hba.eq_info = alloc_percpu(struct lpfc_eq_intr_info);
8403 if (!phba->sli4_hba.eq_info) {
8410 phba->sli4_hba.idle_stat = kcalloc(phba->sli4_hba.num_possible_cpu,
8411 sizeof(*phba->sli4_hba.idle_stat),
8413 if (!phba->sli4_hba.idle_stat) {
8421 phba->sli4_hba.c_stat = alloc_percpu(struct lpfc_hdwq_stat);
8422 if (!phba->sli4_hba.c_stat) {
8459 free_percpu(phba->sli4_hba.c_stat);
8462 kfree(phba->sli4_hba.idle_stat);
8464 free_percpu(phba->sli4_hba.eq_info);
8466 kfree(phba->sli4_hba.cpu_map);
8468 kfree(phba->sli4_hba.hba_eq_hdl);
8505 free_percpu(phba->sli4_hba.eq_info);
8507 free_percpu(phba->sli4_hba.c_stat);
8510 kfree(phba->sli4_hba.idle_stat);
8513 kfree(phba->sli4_hba.cpu_map);
8514 phba->sli4_hba.num_possible_cpu = 0;
8515 phba->sli4_hba.num_present_cpu = 0;
8516 phba->sli4_hba.curr_disp_cpu = 0;
8517 cpumask_clear(&phba->sli4_hba.irq_aff_mask);
8520 kfree(phba->sli4_hba.hba_eq_hdl);
8749 spin_lock_irq(&phba->sli4_hba.sgl_list_lock);
8750 list_splice_init(&phba->sli4_hba.lpfc_els_sgl_list, &sglq_list);
8751 spin_unlock_irq(&phba->sli4_hba.sgl_list_lock);
8771 spin_lock(&phba->sli4_hba.sgl_list_lock);
8772 list_splice_init(&phba->sli4_hba.lpfc_nvmet_sgl_list, &sglq_list);
8773 spin_unlock(&phba->sli4_hba.sgl_list_lock);
8787 phba->sli4_hba.nvmet_xri_cnt = 0;
8802 size *= phba->sli4_hba.max_cfg_param.max_xri;
8804 phba->sli4_hba.lpfc_sglq_active_list =
8806 if (!phba->sli4_hba.lpfc_sglq_active_list)
8822 kfree(phba->sli4_hba.lpfc_sglq_active_list);
8837 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_els_sgl_list);
8838 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_els_sgl_list);
8839 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_nvmet_sgl_list);
8840 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
8843 phba->sli4_hba.els_xri_cnt = 0;
8846 phba->sli4_hba.io_xri_cnt = 0;
8869 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_rpi_hdr_list);
8870 if (!phba->sli4_hba.rpi_hdrs_in_use)
8872 if (phba->sli4_hba.extents_in_use)
8911 if (!phba->sli4_hba.rpi_hdrs_in_use)
8913 if (phba->sli4_hba.extents_in_use)
8917 rpi_limit = phba->sli4_hba.max_cfg_param.max_rpi;
8925 curr_rpi_range = phba->sli4_hba.next_rpi;
8965 rpi_hdr->next_rpi = phba->sli4_hba.next_rpi + LPFC_RPI_HDR_COUNT;
8966 list_add_tail(&rpi_hdr->list, &phba->sli4_hba.lpfc_rpi_hdr_list);
8993 if (!phba->sli4_hba.rpi_hdrs_in_use)
8997 &phba->sli4_hba.lpfc_rpi_hdr_list, list) {
9006 phba->sli4_hba.next_rpi = 0;
9061 kfree(phba->sli4_hba.hdwq);
9427 if (!phba->sli4_hba.PSMPHRregaddr)
9432 if (lpfc_readl(phba->sli4_hba.PSMPHRregaddr,
9469 &phba->sli4_hba.sli_intf),
9471 &phba->sli4_hba.sli_intf),
9473 &phba->sli4_hba.sli_intf),
9475 &phba->sli4_hba.sli_intf),
9477 &phba->sli4_hba.sli_intf),
9479 &phba->sli4_hba.sli_intf));
9486 &phba->sli4_hba.sli_intf);
9489 phba->sli4_hba.ue_mask_lo =
9490 readl(phba->sli4_hba.u.if_type0.UEMASKLOregaddr);
9491 phba->sli4_hba.ue_mask_hi =
9492 readl(phba->sli4_hba.u.if_type0.UEMASKHIregaddr);
9494 readl(phba->sli4_hba.u.if_type0.UERRLOregaddr);
9496 readl(phba->sli4_hba.u.if_type0.UERRHIregaddr);
9497 if ((~phba->sli4_hba.ue_mask_lo & uerrlo_reg.word0) ||
9498 (~phba->sli4_hba.ue_mask_hi & uerrhi_reg.word0)) {
9509 phba->sli4_hba.ue_mask_lo,
9510 phba->sli4_hba.ue_mask_hi);
9517 if (lpfc_readl(phba->sli4_hba.u.if_type2.STATUSregaddr,
9521 readl(phba->sli4_hba.u.if_type2.
9524 readl(phba->sli4_hba.u.if_type2.
9541 &phba->sli4_hba.sli_intf) ==
9567 phba->sli4_hba.u.if_type0.UERRLOregaddr =
9568 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_LO;
9569 phba->sli4_hba.u.if_type0.UERRHIregaddr =
9570 phba->sli4_hba.conf_regs_memmap_p + LPFC_UERR_STATUS_HI;
9571 phba->sli4_hba.u.if_type0.UEMASKLOregaddr =
9572 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_LO;
9573 phba->sli4_hba.u.if_type0.UEMASKHIregaddr =
9574 phba->sli4_hba.conf_regs_memmap_p + LPFC_UE_MASK_HI;
9575 phba->sli4_hba.SLIINTFregaddr =
9576 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
9579 phba->sli4_hba.u.if_type2.EQDregaddr =
9580 phba->sli4_hba.conf_regs_memmap_p +
9582 phba->sli4_hba.u.if_type2.ERR1regaddr =
9583 phba->sli4_hba.conf_regs_memmap_p +
9585 phba->sli4_hba.u.if_type2.ERR2regaddr =
9586 phba->sli4_hba.conf_regs_memmap_p +
9588 phba->sli4_hba.u.if_type2.CTRLregaddr =
9589 phba->sli4_hba.conf_regs_memmap_p +
9591 phba->sli4_hba.u.if_type2.STATUSregaddr =
9592 phba->sli4_hba.conf_regs_memmap_p +
9594 phba->sli4_hba.SLIINTFregaddr =
9595 phba->sli4_hba.conf_regs_memmap_p + LPFC_SLI_INTF;
9596 phba->sli4_hba.PSMPHRregaddr =
9597 phba->sli4_hba.conf_regs_memmap_p +
9599 phba->sli4_hba.RQDBregaddr =
9600 phba->sli4_hba.conf_regs_memmap_p +
9602 phba->sli4_hba.WQDBregaddr =
9603 phba->sli4_hba.conf_regs_memmap_p +
9605 phba->sli4_hba.CQDBregaddr =
9606 phba->sli4_hba.conf_regs_memmap_p + LPFC_EQCQ_DOORBELL;
9607 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
9608 phba->sli4_hba.MQDBregaddr =
9609 phba->sli4_hba.conf_regs_memmap_p + LPFC_MQ_DOORBELL;
9610 phba->sli4_hba.BMBXregaddr =
9611 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
9614 phba->sli4_hba.u.if_type2.EQDregaddr =
9615 phba->sli4_hba.conf_regs_memmap_p +
9617 phba->sli4_hba.u.if_type2.ERR1regaddr =
9618 phba->sli4_hba.conf_regs_memmap_p +
9620 phba->sli4_hba.u.if_type2.ERR2regaddr =
9621 phba->sli4_hba.conf_regs_memmap_p +
9623 phba->sli4_hba.u.if_type2.CTRLregaddr =
9624 phba->sli4_hba.conf_regs_memmap_p +
9626 phba->sli4_hba.u.if_type2.STATUSregaddr =
9627 phba->sli4_hba.conf_regs_memmap_p +
9629 phba->sli4_hba.PSMPHRregaddr =
9630 phba->sli4_hba.conf_regs_memmap_p +
9632 phba->sli4_hba.BMBXregaddr =
9633 phba->sli4_hba.conf_regs_memmap_p + LPFC_BMBX;
9656 phba->sli4_hba.PSMPHRregaddr =
9657 phba->sli4_hba.ctrl_regs_memmap_p +
9659 phba->sli4_hba.ISRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9661 phba->sli4_hba.IMRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9663 phba->sli4_hba.ISCRregaddr = phba->sli4_hba.ctrl_regs_memmap_p +
9667 phba->sli4_hba.RQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9669 phba->sli4_hba.WQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9671 phba->sli4_hba.CQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9673 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9675 phba->sli4_hba.MQDBregaddr = phba->sli4_hba.drbl_regs_memmap_p +
9704 phba->sli4_hba.RQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9707 phba->sli4_hba.WQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9710 phba->sli4_hba.CQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9713 phba->sli4_hba.EQDBregaddr = phba->sli4_hba.CQDBregaddr;
9714 phba->sli4_hba.MQDBregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9716 phba->sli4_hba.BMBXregaddr = (phba->sli4_hba.drbl_regs_memmap_p +
9768 phba->sli4_hba.bmbx.dmabuf = dmabuf;
9769 phba->sli4_hba.bmbx.bmbx_size = bmbx_size;
9771 phba->sli4_hba.bmbx.avirt = PTR_ALIGN(dmabuf->virt,
9773 phba->sli4_hba.bmbx.aphys = ALIGN(dmabuf->phys,
9784 dma_address = &phba->sli4_hba.bmbx.dma_address;
9785 phys_addr = (uint64_t)phba->sli4_hba.bmbx.aphys;
9790 pa_addr = (uint32_t) ((phba->sli4_hba.bmbx.aphys >> 4) & 0x3fffffff);
9811 phba->sli4_hba.bmbx.bmbx_size,
9812 phba->sli4_hba.bmbx.dmabuf->virt,
9813 phba->sli4_hba.bmbx.dmabuf->phys);
9815 kfree(phba->sli4_hba.bmbx.dmabuf);
9816 memset(&phba->sli4_hba.bmbx, 0, sizeof(struct lpfc_bmbx));
9865 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
9867 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
9948 phba->sli4_hba.lnk_info.lnk_dv = LPFC_LNK_DAT_VAL;
9949 phba->sli4_hba.lnk_info.lnk_tp =
9951 phba->sli4_hba.lnk_info.lnk_no =
9955 phba->sli4_hba.lnk_info.lnk_tp,
9956 phba->sli4_hba.lnk_info.lnk_no);
9963 phba->sli4_hba.bbscn_params.word0 = rd_config->word8;
9973 phba->sli4_hba.fawwpn_flag |= LPFC_FAWWPN_CONFIG;
9976 phba->sli4_hba.fawwpn_flag &= ~LPFC_FAWWPN_CONFIG;
9979 phba->sli4_hba.conf_trunk =
9981 phba->sli4_hba.extents_in_use =
9984 phba->sli4_hba.max_cfg_param.max_xri =
9988 phba->sli4_hba.max_cfg_param.max_xri > 512)
9989 phba->sli4_hba.max_cfg_param.max_xri = 512;
9990 phba->sli4_hba.max_cfg_param.xri_base =
9992 phba->sli4_hba.max_cfg_param.max_vpi =
9995 if (phba->sli4_hba.max_cfg_param.max_vpi > LPFC_MAX_VPORTS)
9996 phba->sli4_hba.max_cfg_param.max_vpi = LPFC_MAX_VPORTS;
9997 phba->sli4_hba.max_cfg_param.vpi_base =
9999 phba->sli4_hba.max_cfg_param.max_rpi =
10001 phba->sli4_hba.max_cfg_param.rpi_base =
10003 phba->sli4_hba.max_cfg_param.max_vfi =
10005 phba->sli4_hba.max_cfg_param.vfi_base =
10007 phba->sli4_hba.max_cfg_param.max_fcfi =
10009 phba->sli4_hba.max_cfg_param.max_eq =
10011 phba->sli4_hba.max_cfg_param.max_rq =
10013 phba->sli4_hba.max_cfg_param.max_wq =
10015 phba->sli4_hba.max_cfg_param.max_cq =
10018 phba->sli4_hba.next_xri = phba->sli4_hba.max_cfg_param.xri_base;
10019 phba->vpi_base = phba->sli4_hba.max_cfg_param.vpi_base;
10020 phba->vfi_base = phba->sli4_hba.max_cfg_param.vfi_base;
10021 phba->max_vpi = (phba->sli4_hba.max_cfg_param.max_vpi > 0) ?
10022 (phba->sli4_hba.max_cfg_param.max_vpi - 1) : 0;
10078 phba->sli4_hba.extents_in_use,
10079 phba->sli4_hba.max_cfg_param.xri_base,
10080 phba->sli4_hba.max_cfg_param.max_xri,
10081 phba->sli4_hba.max_cfg_param.vpi_base,
10082 phba->sli4_hba.max_cfg_param.max_vpi,
10083 phba->sli4_hba.max_cfg_param.vfi_base,
10084 phba->sli4_hba.max_cfg_param.max_vfi,
10085 phba->sli4_hba.max_cfg_param.rpi_base,
10086 phba->sli4_hba.max_cfg_param.max_rpi,
10087 phba->sli4_hba.max_cfg_param.max_fcfi,
10088 phba->sli4_hba.max_cfg_param.max_eq,
10089 phba->sli4_hba.max_cfg_param.max_cq,
10090 phba->sli4_hba.max_cfg_param.max_wq,
10091 phba->sli4_hba.max_cfg_param.max_rq,
10098 qmin = phba->sli4_hba.max_cfg_param.max_wq;
10099 if (phba->sli4_hba.max_cfg_param.max_cq < qmin)
10100 qmin = phba->sli4_hba.max_cfg_param.max_cq;
10106 if (phba->sli4_hba.max_cfg_param.max_eq < qmin)
10107 qmin = phba->sli4_hba.max_cfg_param.max_eq;
10117 phba->sli4_hba.max_cfg_param.max_wq,
10118 phba->sli4_hba.max_cfg_param.max_cq,
10119 phba->sli4_hba.max_cfg_param.max_eq,
10134 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10191 length = phba->sli4_hba.max_cfg_param.max_xri -
10200 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
10240 phba->sli4_hba.iov.pf_number =
10242 phba->sli4_hba.iov.vf_number =
10251 "vf_number:%d\n", phba->sli4_hba.iov.pf_number,
10252 phba->sli4_hba.iov.vf_number);
10285 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
10357 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
10358 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
10361 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
10362 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
10378 phba->sli4_hba.cq_esize,
10383 phba->sli4_hba.cq_esize,
10384 phba->sli4_hba.cq_ecount, cpu);
10394 phba->sli4_hba.hdwq[idx].io_cq = qdesc;
10400 LPFC_WQE128_SIZE : phba->sli4_hba.wq_esize;
10406 phba->sli4_hba.wq_esize,
10407 phba->sli4_hba.wq_ecount, cpu);
10417 phba->sli4_hba.hdwq[idx].io_wq = qdesc;
10418 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10450 phba->sli4_hba.mq_esize = LPFC_MQE_SIZE;
10451 phba->sli4_hba.mq_ecount = LPFC_MQE_DEF_COUNT;
10452 phba->sli4_hba.wq_esize = LPFC_WQE_SIZE;
10453 phba->sli4_hba.wq_ecount = LPFC_WQE_DEF_COUNT;
10454 phba->sli4_hba.rq_esize = LPFC_RQE_SIZE;
10455 phba->sli4_hba.rq_ecount = LPFC_RQE_DEF_COUNT;
10456 phba->sli4_hba.eq_esize = LPFC_EQE_SIZE_4B;
10457 phba->sli4_hba.eq_ecount = LPFC_EQE_DEF_COUNT;
10458 phba->sli4_hba.cq_esize = LPFC_CQE_SIZE;
10459 phba->sli4_hba.cq_ecount = LPFC_CQE_DEF_COUNT;
10461 if (!phba->sli4_hba.hdwq) {
10462 phba->sli4_hba.hdwq = kcalloc(
10465 if (!phba->sli4_hba.hdwq) {
10473 qp = &phba->sli4_hba.hdwq[idx];
10493 phba->sli4_hba.nvmet_cqset = kcalloc(
10497 if (!phba->sli4_hba.nvmet_cqset) {
10503 phba->sli4_hba.nvmet_mrq_hdr = kcalloc(
10507 if (!phba->sli4_hba.nvmet_mrq_hdr) {
10513 phba->sli4_hba.nvmet_mrq_data = kcalloc(
10517 if (!phba->sli4_hba.nvmet_mrq_data) {
10526 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
10534 cpup = &phba->sli4_hba.cpu_map[cpu];
10539 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
10543 phba->sli4_hba.eq_esize,
10544 phba->sli4_hba.eq_ecount, cpu);
10559 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, qdesc->last_cpu);
10567 cpup = &phba->sli4_hba.cpu_map[cpu];
10574 qp = &phba->sli4_hba.hdwq[cpup->hdwq];
10580 eqcpup = &phba->sli4_hba.cpu_map[eqcpu];
10581 qp->hba_eq = phba->sli4_hba.hdwq[eqcpup->hdwq].hba_eq;
10596 phba->sli4_hba.cq_esize,
10597 phba->sli4_hba.cq_ecount,
10608 phba->sli4_hba.nvmet_cqset[idx] = qdesc;
10619 phba->sli4_hba.cq_esize,
10620 phba->sli4_hba.cq_ecount, cpu);
10627 phba->sli4_hba.mbx_cq = qdesc;
10631 phba->sli4_hba.cq_esize,
10632 phba->sli4_hba.cq_ecount, cpu);
10640 phba->sli4_hba.els_cq = qdesc;
10650 phba->sli4_hba.mq_esize,
10651 phba->sli4_hba.mq_ecount, cpu);
10658 phba->sli4_hba.mbx_wq = qdesc;
10666 phba->sli4_hba.wq_esize,
10667 phba->sli4_hba.wq_ecount, cpu);
10674 phba->sli4_hba.els_wq = qdesc;
10675 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10680 phba->sli4_hba.cq_esize,
10681 phba->sli4_hba.cq_ecount, cpu);
10689 phba->sli4_hba.nvmels_cq = qdesc;
10693 phba->sli4_hba.wq_esize,
10694 phba->sli4_hba.wq_ecount, cpu);
10701 phba->sli4_hba.nvmels_wq = qdesc;
10702 list_add_tail(&qdesc->wq_list, &phba->sli4_hba.lpfc_wq_list);
10711 phba->sli4_hba.rq_esize,
10712 phba->sli4_hba.rq_ecount, cpu);
10718 phba->sli4_hba.hdr_rq = qdesc;
10722 phba->sli4_hba.rq_esize,
10723 phba->sli4_hba.rq_ecount, cpu);
10729 phba->sli4_hba.dat_rq = qdesc;
10739 phba->sli4_hba.rq_esize,
10749 phba->sli4_hba.nvmet_mrq_hdr[idx] = qdesc;
10768 phba->sli4_hba.rq_esize,
10778 phba->sli4_hba.nvmet_mrq_data[idx] = qdesc;
10785 memset(&phba->sli4_hba.hdwq[idx].nvme_cstat, 0,
10786 sizeof(phba->sli4_hba.hdwq[idx].nvme_cstat));
10793 memset(&phba->sli4_hba.hdwq[idx].scsi_cstat, 0,
10794 sizeof(phba->sli4_hba.hdwq[idx].scsi_cstat));
10836 hdwq = phba->sli4_hba.hdwq;
10853 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
10855 phba->sli4_hba.hba_eq_hdl[idx].eq = NULL;
10891 if (phba->sli4_hba.hdwq)
10895 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_cqset,
10898 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_hdr,
10900 lpfc_sli4_release_queues(&phba->sli4_hba.nvmet_mrq_data,
10905 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_wq);
10908 __lpfc_sli4_release_queue(&phba->sli4_hba.els_wq);
10911 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_wq);
10914 __lpfc_sli4_release_queue(&phba->sli4_hba.hdr_rq);
10915 __lpfc_sli4_release_queue(&phba->sli4_hba.dat_rq);
10918 __lpfc_sli4_release_queue(&phba->sli4_hba.els_cq);
10921 __lpfc_sli4_release_queue(&phba->sli4_hba.nvmels_cq);
10924 __lpfc_sli4_release_queue(&phba->sli4_hba.mbx_cq);
10927 INIT_LIST_HEAD(&phba->sli4_hba.lpfc_wq_list);
11018 phba->sli4_hba.mbx_wq->queue_id,
11019 phba->sli4_hba.mbx_cq->queue_id);
11038 memset(phba->sli4_hba.cq_lookup, 0,
11039 (sizeof(struct lpfc_queue *) * (phba->sli4_hba.cq_max + 1)));
11043 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
11048 if (childq->queue_id > phba->sli4_hba.cq_max)
11051 phba->sli4_hba.cq_lookup[childq->queue_id] =
11111 phba->sli4_hba.fw_func_mode =
11113 phba->sli4_hba.ulp0_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp0_mode;
11114 phba->sli4_hba.ulp1_mode = mboxq->u.mqe.un.query_fw_cfg.rsp.ulp1_mode;
11115 phba->sli4_hba.physical_port =
11119 "ulp1_mode:x%x\n", phba->sli4_hba.fw_func_mode,
11120 phba->sli4_hba.ulp0_mode, phba->sli4_hba.ulp1_mode);
11127 qp = phba->sli4_hba.hdwq;
11141 cpup = &phba->sli4_hba.cpu_map[cpu];
11163 phba->sli4_hba.hba_eq_hdl[cpup->eq].eq =
11176 cpup = &phba->sli4_hba.cpu_map[cpu];
11180 phba->sli4_hba.hdwq[cpup->hdwq].hba_eq,
11183 &phba->sli4_hba.hdwq[qidx].io_cq_map,
11201 if (!phba->sli4_hba.mbx_cq || !phba->sli4_hba.mbx_wq) {
11204 phba->sli4_hba.mbx_cq ?
11211 phba->sli4_hba.mbx_cq,
11212 phba->sli4_hba.mbx_wq,
11221 if (!phba->sli4_hba.nvmet_cqset) {
11230 phba->sli4_hba.nvmet_cqset,
11242 rc = lpfc_cq_create(phba, phba->sli4_hba.nvmet_cqset[0],
11251 phba->sli4_hba.nvmet_cqset[0]->chann = 0;
11256 phba->sli4_hba.nvmet_cqset[0]->queue_id,
11262 if (!phba->sli4_hba.els_cq || !phba->sli4_hba.els_wq) {
11265 phba->sli4_hba.els_cq ? "WQ" : "CQ");
11270 phba->sli4_hba.els_cq,
11271 phba->sli4_hba.els_wq,
11281 phba->sli4_hba.els_wq->queue_id,
11282 phba->sli4_hba.els_cq->queue_id);
11286 if (!phba->sli4_hba.nvmels_cq || !phba->sli4_hba.nvmels_wq) {
11289 phba->sli4_hba.nvmels_cq ? "WQ" : "CQ");
11294 phba->sli4_hba.nvmels_cq,
11295 phba->sli4_hba.nvmels_wq,
11307 phba->sli4_hba.nvmels_wq->queue_id,
11308 phba->sli4_hba.nvmels_cq->queue_id);
11315 if ((!phba->sli4_hba.nvmet_cqset) ||
11316 (!phba->sli4_hba.nvmet_mrq_hdr) ||
11317 (!phba->sli4_hba.nvmet_mrq_data)) {
11326 phba->sli4_hba.nvmet_mrq_hdr,
11327 phba->sli4_hba.nvmet_mrq_data,
11328 phba->sli4_hba.nvmet_cqset,
11340 phba->sli4_hba.nvmet_mrq_hdr[0],
11341 phba->sli4_hba.nvmet_mrq_data[0],
11342 phba->sli4_hba.nvmet_cqset[0],
11356 phba->sli4_hba.nvmet_mrq_hdr[0]->queue_id,
11357 phba->sli4_hba.nvmet_mrq_data[0]->queue_id,
11358 phba->sli4_hba.nvmet_cqset[0]->queue_id);
11363 if (!phba->sli4_hba.hdr_rq || !phba->sli4_hba.dat_rq) {
11370 rc = lpfc_rq_create(phba, phba->sli4_hba.hdr_rq, phba->sli4_hba.dat_rq,
11371 phba->sli4_hba.els_cq, LPFC_USOL);
11382 phba->sli4_hba.hdr_rq->queue_id,
11383 phba->sli4_hba.dat_rq->queue_id,
11384 phba->sli4_hba.els_cq->queue_id);
11396 if (phba->sli4_hba.cq_max) {
11397 kfree(phba->sli4_hba.cq_lookup);
11398 phba->sli4_hba.cq_lookup = kcalloc((phba->sli4_hba.cq_max + 1),
11400 if (!phba->sli4_hba.cq_lookup) {
11403 "size 0x%x\n", phba->sli4_hba.cq_max);
11437 if (phba->sli4_hba.mbx_wq)
11438 lpfc_mq_destroy(phba, phba->sli4_hba.mbx_wq);
11441 if (phba->sli4_hba.nvmels_wq)
11442 lpfc_wq_destroy(phba, phba->sli4_hba.nvmels_wq);
11445 if (phba->sli4_hba.els_wq)
11446 lpfc_wq_destroy(phba, phba->sli4_hba.els_wq);
11449 if (phba->sli4_hba.hdr_rq)
11450 lpfc_rq_destroy(phba, phba->sli4_hba.hdr_rq,
11451 phba->sli4_hba.dat_rq);
11454 if (phba->sli4_hba.mbx_cq)
11455 lpfc_cq_destroy(phba, phba->sli4_hba.mbx_cq);
11458 if (phba->sli4_hba.els_cq)
11459 lpfc_cq_destroy(phba, phba->sli4_hba.els_cq);
11462 if (phba->sli4_hba.nvmels_cq)
11463 lpfc_cq_destroy(phba, phba->sli4_hba.nvmels_cq);
11467 if (phba->sli4_hba.nvmet_mrq_hdr) {
11471 phba->sli4_hba.nvmet_mrq_hdr[qidx],
11472 phba->sli4_hba.nvmet_mrq_data[qidx]);
11476 if (phba->sli4_hba.nvmet_cqset) {
11479 phba, phba->sli4_hba.nvmet_cqset[qidx]);
11484 if (phba->sli4_hba.hdwq) {
11488 qp = &phba->sli4_hba.hdwq[qidx];
11495 eq = phba->sli4_hba.hba_eq_hdl[qidx].eq;
11500 kfree(phba->sli4_hba.cq_lookup);
11501 phba->sli4_hba.cq_lookup = NULL;
11502 phba->sli4_hba.cq_max = 0;
11527 for (i = 0; i < (4 * phba->sli4_hba.cq_ecount); i++) {
11532 &phba->sli4_hba.sp_cqe_event_pool);
11557 &phba->sli4_hba.sp_cqe_event_pool, list) {
11578 list_remove_head(&phba->sli4_hba.sp_cqe_event_pool, cq_event,
11617 list_add_tail(&cq_event->list, &phba->sli4_hba.sp_cqe_event_pool);
11655 spin_lock_irqsave(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
11656 list_splice_init(&phba->sli4_hba.sp_els_xri_aborted_work_queue,
11658 spin_unlock_irqrestore(&phba->sli4_hba.els_xri_abrt_list_lock, iflags);
11661 spin_lock_irqsave(&phba->sli4_hba.asynce_list_lock, iflags);
11662 list_splice_init(&phba->sli4_hba.sp_asynce_work_queue,
11664 spin_unlock_irqrestore(&phba->sli4_hba.asynce_list_lock, iflags);
11697 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11739 if (lpfc_readl(phba->sli4_hba.u.if_type2.
11751 phba->sli4_hba.u.if_type2.ERR1regaddr);
11753 phba->sli4_hba.u.if_type2.ERR2regaddr);
11776 writel(reg_data.word0, phba->sli4_hba.u.if_type2.
11842 &phba->sli4_hba.sli_intf.word0)) {
11847 if (bf_get(lpfc_sli_intf_valid, &phba->sli4_hba.sli_intf) !=
11852 phba->sli4_hba.sli_intf.word0);
11856 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
11871 phba->sli4_hba.conf_regs_memmap_p =
11873 if (!phba->sli4_hba.conf_regs_memmap_p) {
11879 phba->pci_bar0_memmap_p = phba->sli4_hba.conf_regs_memmap_p;
11890 phba->sli4_hba.conf_regs_memmap_p =
11892 if (!phba->sli4_hba.conf_regs_memmap_p) {
11910 phba->sli4_hba.ctrl_regs_memmap_p =
11913 if (!phba->sli4_hba.ctrl_regs_memmap_p) {
11921 phba->sli4_hba.ctrl_regs_memmap_p;
11937 phba->sli4_hba.drbl_regs_memmap_p =
11939 if (!phba->sli4_hba.drbl_regs_memmap_p) {
11945 phba->pci_bar2_memmap_p = phba->sli4_hba.drbl_regs_memmap_p;
11958 phba->sli4_hba.drbl_regs_memmap_p =
11961 if (!phba->sli4_hba.drbl_regs_memmap_p) {
11969 phba->sli4_hba.drbl_regs_memmap_p;
11987 phba->sli4_hba.dpp_regs_memmap_p =
11989 if (!phba->sli4_hba.dpp_regs_memmap_p) {
11995 phba->pci_bar4_memmap_p = phba->sli4_hba.dpp_regs_memmap_p;
12002 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_eq_clr_intr;
12003 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_write_eq_db;
12004 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_write_cq_db;
12007 phba->sli4_hba.sli4_eq_clr_intr = lpfc_sli4_if6_eq_clr_intr;
12008 phba->sli4_hba.sli4_write_eq_db = lpfc_sli4_if6_write_eq_db;
12009 phba->sli4_hba.sli4_write_cq_db = lpfc_sli4_if6_write_cq_db;
12018 if (phba->sli4_hba.drbl_regs_memmap_p)
12019 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12021 if (phba->sli4_hba.ctrl_regs_memmap_p)
12022 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
12024 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12040 if_type = bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf);
12044 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12045 iounmap(phba->sli4_hba.ctrl_regs_memmap_p);
12046 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12049 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12052 iounmap(phba->sli4_hba.drbl_regs_memmap_p);
12053 iounmap(phba->sli4_hba.conf_regs_memmap_p);
12054 if (phba->sli4_hba.dpp_regs_memmap_p)
12055 iounmap(phba->sli4_hba.dpp_regs_memmap_p);
12313 cpup = &phba->sli4_hba.cpu_map[cpu];
12347 cpup = &phba->sli4_hba.cpu_map[idx];
12371 struct lpfc_vector_map_info *cpup = &phba->sli4_hba.cpu_map[cpu];
12396 cpup = &phba->sli4_hba.cpu_map[cpu];
12402 eqi = per_cpu_ptr(phba->sli4_hba.eq_info, cpu);
12435 * and the phba->sli4_hba.cpu_map array will reflect this.
12459 cpup = &phba->sli4_hba.cpu_map[cpu];
12496 cpup = &phba->sli4_hba.cpu_map[cpu];
12509 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12510 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12542 cpup = &phba->sli4_hba.cpu_map[cpu];
12555 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12556 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12591 cpup = &phba->sli4_hba.cpu_map[cpu];
12618 cpup = &phba->sli4_hba.cpu_map[cpu];
12640 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12641 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12654 for (i = 0; i < phba->sli4_hba.num_present_cpu; i++) {
12655 new_cpup = &phba->sli4_hba.cpu_map[new_cpu];
12684 cpup = &phba->sli4_hba.cpu_map[cpu];
12686 c_stat = per_cpu_ptr(phba->sli4_hba.c_stat, cpu);
12754 eq = phba->sli4_hba.hba_eq_hdl[idx].eq;
12871 orig_mask = &phba->sli4_hba.irq_aff_mask;
12876 cpup = &phba->sli4_hba.cpu_map[cpu];
13010 aff_mask = &phba->sli4_hba.irq_aff_mask;
13086 cpup = &phba->sli4_hba.cpu_map[cpu];
13367 int els_xri_cmpl = list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
13381 qp = &phba->sli4_hba.hdwq[idx];
13391 list_empty(&phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
13420 qp = &phba->sli4_hba.hdwq[idx];
13431 &phba->sli4_hba.lpfc_abts_nvmet_ctx_list);
13434 list_empty(&phba->sli4_hba.lpfc_abts_els_sgl_list);
13461 phba->sli4_hba.intr_enable = 0;
13753 phba->sli4_hba.rpi_hdrs_in_use = 1;
13761 if (!phba->sli4_hba.intr_enable)
13769 sli4_params = &phba->sli4_hba.pc_sli4_params;
13800 phba->sli4_hba.extents_in_use = bf_get(cfg_ext, mbx_sli4_parameters);
13801 phba->sli4_hba.rpi_hdrs_in_use = bf_get(cfg_hdrr, mbx_sli4_parameters);
13902 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
13904 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==
14524 int max_xri = phba->sli4_hba.max_cfg_param.max_xri;
14570 sli_family = bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf);
14733 if (bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) <
15638 if (phba->sli4_hba.pc_sli4_params.oas_supported) {
15660 if ((bf_get(lpfc_sli_intf_if_type, &phba->sli4_hba.sli_intf) ==
15662 (bf_get(lpfc_sli_intf_sli_family, &phba->sli4_hba.sli_intf) ==