Lines Matching refs:set_interrupt_mask_reg
99 .set_interrupt_mask_reg = 0x0022C,
124 .set_interrupt_mask_reg = 0x00288,
149 .set_interrupt_mask_reg = 0x00010,
743 writeq(~0, ioa_cfg->regs.set_interrupt_mask_reg);
745 writel(~0, ioa_cfg->regs.set_interrupt_mask_reg);
5358 writel(IPR_PCII_IOA_TRANS_TO_OPER, ioa_cfg->regs.set_interrupt_mask_reg);
7633 writel(IPR_PCII_IPL_STAGE_CHANGE, ioa_cfg->regs.set_interrupt_mask_reg);
7643 writeq(maskval, ioa_cfg->regs.set_interrupt_mask_reg);
9129 t->set_interrupt_mask_reg = base + p->set_interrupt_mask_reg;