Lines Matching defs:vaddr
301 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
311 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
1167 writel(c->busaddr, h->vaddr + SA5_REQUEST_PORT_OFFSET);
1171 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
1175 writel(c->busaddr, h->vaddr + IOACCEL2_INBOUND_POSTQ_32);
7102 void __iomem *vaddr;
7105 vaddr = pci_ioremap_bar(pdev, 0);
7106 if (vaddr == NULL)
7115 iounmap(vaddr);
7121 iounmap(vaddr);
7148 writel(le32_to_cpu(paddr32), vaddr + SA5_REQUEST_PORT_OFFSET);
7151 tag = readl(vaddr + SA5_REPLY_PORT_OFFSET);
7157 iounmap(vaddr);
7184 void __iomem *vaddr, u32 use_doorbell)
7193 writel(use_doorbell, vaddr + SA5_DOORBELL);
7296 void __iomem *vaddr;
7334 vaddr = remap_pci_mem(paddr, 0x250);
7335 if (!vaddr)
7339 rc = hpsa_find_cfg_addrs(pdev, vaddr, &cfg_base_addr,
7370 rc = hpsa_controller_hard_reset(pdev, vaddr, use_doorbell);
7381 rc = hpsa_wait_for_board_state(pdev, vaddr, BOARD_READY);
7388 rc = controller_reset_failed(vaddr);
7403 iounmap(vaddr);
7589 static int hpsa_wait_for_board_state(struct pci_dev *pdev, void __iomem *vaddr,
7600 scratchpad = readl(vaddr + SA5_SCRATCHPAD_OFFSET);
7614 static int hpsa_find_cfg_addrs(struct pci_dev *pdev, void __iomem *vaddr,
7618 *cfg_base_addr = readl(vaddr + SA5_CTCFG_OFFSET);
7619 *cfg_offset = readl(vaddr + SA5_CTMEM_OFFSET);
7652 rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
7774 dma_prefetch = readl(h->vaddr + I2O_DMA1_CFG);
7776 writel(dma_prefetch, h->vaddr + I2O_DMA1_CFG);
7787 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7813 doorbell_value = readl(h->vaddr + SA5_DOORBELL);
7839 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
7856 iounmap(h->vaddr); /* pci_init 3 */
7857 h->vaddr = NULL;
7909 h->vaddr = remap_pci_mem(h->paddr, 0x250);
7910 if (!h->vaddr) {
7915 err = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
7917 goto clean3; /* vaddr, intmode+region, pci */
7920 goto clean3; /* vaddr, intmode+region, pci */
7925 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7931 goto clean4; /* cfgtables, vaddr, intmode+region, pci */
7934 clean4: /* cfgtables, vaddr, intmode+region, pci */
7936 clean3: /* vaddr, intmode+region, pci */
7937 iounmap(h->vaddr);
7938 h->vaddr = NULL;
7970 void __iomem *vaddr;
7994 vaddr = pci_ioremap_bar(pdev, 0);
7995 if (vaddr == NULL) {
7999 writel(SA5_INTR_OFF, vaddr + SA5_REPLY_INTR_MASK_OFFSET);
8000 iounmap(vaddr);
8171 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_NOT_READY);
8178 rc = hpsa_wait_for_board_state(h->pdev, h->vaddr, BOARD_READY);
8274 lockup_detected = readl(h->vaddr + SA5_SCRATCHPAD_OFFSET);
8288 writel(DOORBELL_GENERATE_CHKPT, h->vaddr + SA5_DOORBELL);
8439 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
8446 writel(DOORBELL_CLEAR_EVENTS, h->vaddr + SA5_DOORBELL);
9263 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
9286 writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
9288 readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
9325 hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
9343 writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);