Lines Matching defs:queue
1069 * Tell the controller to post the reply to the queue for this
1090 /* Tell the controller to post the reply to the queue for this
1109 * Tell the controller to post the reply to the queue for this
4179 /* get physical drive ioaccel handle and queue depth */
5057 /* Try to honor the device's queue depth */
5910 * reply queue; returns zero if the unit is ready, and non-zero otherwise.
5994 * If no specific reply queue was requested, then send the TUR
5995 * repeatedly, requesting a reply on each reply queue; otherwise execute
5996 * the loop exactly once using only the specified queue.
7009 static struct ctlr_info *queue_to_hba(u8 *queue)
7011 return container_of((queue - *queue), struct ctlr_info, q[0]);
7014 static irqreturn_t hpsa_intx_discard_completions(int irq, void *queue)
7016 struct ctlr_info *h = queue_to_hba(queue);
7017 u8 q = *(u8 *) queue;
7034 static irqreturn_t hpsa_msix_discard_completions(int irq, void *queue)
7036 struct ctlr_info *h = queue_to_hba(queue);
7038 u8 q = *(u8 *) queue;
7050 static irqreturn_t do_hpsa_intr_intx(int irq, void *queue)
7052 struct ctlr_info *h = queue_to_hba((u8 *) queue);
7054 u8 q = *(u8 *) queue;
7069 static irqreturn_t do_hpsa_intr_msi(int irq, void *queue)
7071 struct ctlr_info *h = queue_to_hba(queue);
7073 u8 q = *(u8 *) queue;
7490 unsigned int queue, cpu;
7492 for (queue = 0; queue < h->msix_vectors; queue++) {
7493 mask = pci_irq_get_affinity(h->pdev, queue);
7498 h->reply_map[cpu] = queue;
7903 /* setup mapping between CPU and reply queue */
8083 /* Single reply queue, only one irq to free */
8111 * queue to process.
9294 /* initialize all reply queue entries to unused */