Lines Matching refs:virt
79 return dma->virt;
447 dma->virt = dma_alloc_coherent(&sli4->pci->dev, dma->size,
449 if (!dma->virt)
452 memset(dma->virt, 0, payload_size);
454 req = sli_config_cmd_init(sli4, sli4->bmbx.virt, payload_size, dma);
494 q->dma.virt, q->dma.phys);
502 if (q->dma.virt) {
510 q->dma.virt = dma_alloc_coherent(&sli4->pci->dev, q->dma.size,
512 if (!q->dma.virt) {
518 memset(q->dma.virt, 0, size * n_entries);
553 if (sli_cmd_rq_create_v1(sli4, sli4->bmbx.virt, &q->dma, cq->id,
616 rsp = dma.virt;
633 dma_free_coherent(&sli4->pci->dev, dma.size, dma.virt, dma.phys);
641 if (dma.virt)
642 dma_free_coherent(&sli4->pci->dev, dma.size, dma.virt,
681 if (sli_res_sli_config(sli4, sli4->bmbx.virt)) {
686 res_q = (void *)((u8 *)sli4->bmbx.virt +
781 if (!sli_cmd_common_create_eq(sli4, sli4->bmbx.virt, &q->dma) &&
787 if (!sli_cmd_common_create_cq(sli4, sli4->bmbx.virt, &q->dma,
795 if (!sli_cmd_common_create_mq_ext(sli4, sli4->bmbx.virt,
802 if (!sli_cmd_wq_create(sli4, sli4->bmbx.virt, &q->dma,
851 dma->virt = dma_alloc_coherent(&sli4->pci->dev, dma->size,
853 if (!dma->virt)
856 memset(dma->virt, 0, payload_size);
858 req = sli_config_cmd_init(sli4, sli4->bmbx.virt, payload_size, dma);
943 res = dma.virt;
961 dma_free_coherent(&sli4->pci->dev, dma.size, dma.virt, dma.phys);
969 if (dma.virt)
970 dma_free_coherent(&sli4->pci->dev, dma.size, dma.virt,
982 req = sli_config_cmd_init(sli4, sli4->bmbx.virt,
1045 rc = sli_res_sli_config(sli4, sli4->bmbx.virt);
1049 res = (void *)((u8 *)sli4->bmbx.virt +
1127 u8 *qe = q->dma.virt;
1149 u8 *qe = q->dma.virt;
1170 u8 *qe = q->dma.virt;
1199 u8 *qe = q->dma.virt;
1241 u8 *qe = q->dma.virt;
1285 u8 *qe = q->dma.virt;
1422 struct sli4_sge *sge = sgl->virt;
1573 if (!sgl || !sgl->virt) {
1574 efc_log_err(sli, "bad parameter sgl=%p virt=%p\n",
1575 sgl, sgl ? sgl->virt : NULL);
1578 sge = sgl->virt;
1640 if (!sgl || !sgl->virt) {
1641 efc_log_err(sli, "bad parameter sgl=%p virt=%p\n",
1642 sgl, sgl ? sgl->virt : NULL);
1646 sge = sgl->virt;
1743 if (!sgl || !sgl->virt) {
1744 efc_log_err(sli, "bad parameter sgl=%p virt=%p\n",
1745 sgl, sgl ? sgl->virt : NULL);
1748 sge = sgl->virt;
1834 if (!sgl || !sgl->virt) {
1835 efc_log_err(sli, "bad parameter sgl=%p virt=%p\n",
1836 sgl, sgl ? sgl->virt : NULL);
1839 sge = sgl->virt;
1971 struct sli4_sge *sge = sgl->virt;
2037 if (!sgl || !sgl->virt) {
2038 efc_log_err(sli4, "bad parameter sgl=%p virt=%p\n",
2039 sgl, sgl ? sgl->virt : NULL);
2042 sge = sgl->virt;
2161 if (!sgl || !sgl->virt) {
2162 efc_log_err(sli4, "bad parameter sgl=%p virt=%p\n",
2163 sgl, sgl ? sgl->virt : NULL);
2166 sge = sgl->virt;
2413 if (!payload || !payload->virt) {
2414 efc_log_err(sli4, "bad parameter sgl=%p virt=%p\n",
2415 payload, payload ? payload->virt : NULL);
2906 void *cqe = (u8 *)sli4->bmbx.virt + SLI4_BMBX_SIZE;
3296 memset(dma->virt, 0, dma->size);
4092 struct sli4_cmd_request_features *req_features = sli4->bmbx.virt;
4094 if (sli_cmd_request_features(sli4, sli4->bmbx.virt, *features, query)) {
4143 struct sli4_rsp_read_config *conf = sli4->bmbx.virt;
4147 if (sli_cmd_read_config(sli4, sli4->bmbx.virt)) {
4258 if (sli_cmd_common_get_sli4_parameters(sli4, sli4->bmbx.virt))
4262 (((u8 *)sli4->bmbx.virt) +
4381 memset(sli4->vpd_data.virt, 0, sli4->vpd_data.size);
4382 if (sli_cmd_common_get_cntl_attributes(sli4, sli4->bmbx.virt,
4388 attr = sli4->vpd_data.virt;
4411 data.virt = dma_alloc_coherent(&sli4->pci->dev, data.size,
4413 if (!data.virt) {
4419 if (sli_cmd_common_get_cntl_addl_attributes(sli4, sli4->bmbx.virt,
4423 data.virt, data.phys);
4430 data.virt, data.phys);
4434 add_attr = data.virt;
4439 data.virt, data.phys);
4447 dma_free_coherent(&sli4->pci->dev, data.size, data.virt,
4456 struct sli4_cmd_read_rev *read_rev = sli4->bmbx.virt;
4458 if (sli_cmd_read_rev(sli4, sli4->bmbx.virt, &sli4->vpd_data))
4523 if (sli_cmd_common_get_port_name(sli4, sli4->bmbx.virt))
4527 (((u8 *)sli4->bmbx.virt) +
4541 if (sli_cmd_read_nvparms(sli4, sli4->bmbx.virt)) {
4551 read_nvparms = sli4->bmbx.virt;
4651 sli4->bmbx.virt = dma_alloc_coherent(&pdev->dev, sli4->bmbx.size,
4653 if (!sli4->bmbx.virt) {
4664 efc_log_info(sli4, "bmbx v=%p p=0x%x %08x s=%zd\n", sli4->bmbx.virt,
4670 sli4->vpd_data.virt = dma_alloc_coherent(&pdev->dev,
4674 if (!sli4->vpd_data.virt) {
4790 sli4->vpd_data.virt, sli4->vpd_data.phys);
4794 sli4->bmbx.virt, sli4->bmbx.phys);
4825 sli_cmd_common_modify_eq_delay(sli4, sli4->bmbx.virt, eq, num_eq,
4832 if (sli_res_sli_config(sli4, sli4->bmbx.virt)) {
5067 payload_dma->virt = dma_alloc_coherent(&sli4->pci->dev,
5070 if (!payload_dma->virt) {