Lines Matching refs:bmbx
454 req = sli_config_cmd_init(sli4, sli4->bmbx.virt, payload_size, dma);
553 if (sli_cmd_rq_create_v1(sli4, sli4->bmbx.virt, &q->dma, cq->id,
681 if (sli_res_sli_config(sli4, sli4->bmbx.virt)) {
686 res_q = (void *)((u8 *)sli4->bmbx.virt +
781 if (!sli_cmd_common_create_eq(sli4, sli4->bmbx.virt, &q->dma) &&
787 if (!sli_cmd_common_create_cq(sli4, sli4->bmbx.virt, &q->dma,
795 if (!sli_cmd_common_create_mq_ext(sli4, sli4->bmbx.virt,
802 if (!sli_cmd_wq_create(sli4, sli4->bmbx.virt, &q->dma,
858 req = sli_config_cmd_init(sli4, sli4->bmbx.virt, payload_size, dma);
982 req = sli_config_cmd_init(sli4, sli4->bmbx.virt,
1045 rc = sli_res_sli_config(sli4, sli4->bmbx.virt);
1049 res = (void *)((u8 *)sli4->bmbx.virt +
2889 val = sli_bmbx_write_hi(sli4->bmbx.phys);
2896 val = sli_bmbx_write_lo(sli4->bmbx.phys);
2906 void *cqe = (u8 *)sli4->bmbx.virt + SLI4_BMBX_SIZE;
2919 efc_log_crit(sli4, "bmbx write fail phys=%pad reg=%#x\n",
2920 &sli4->bmbx.phys, readl(sli4->reg[0] + SLI4_BMBX_REG));
4092 struct sli4_cmd_request_features *req_features = sli4->bmbx.virt;
4094 if (sli_cmd_request_features(sli4, sli4->bmbx.virt, *features, query)) {
4143 struct sli4_rsp_read_config *conf = sli4->bmbx.virt;
4147 if (sli_cmd_read_config(sli4, sli4->bmbx.virt)) {
4258 if (sli_cmd_common_get_sli4_parameters(sli4, sli4->bmbx.virt))
4262 (((u8 *)sli4->bmbx.virt) +
4382 if (sli_cmd_common_get_cntl_attributes(sli4, sli4->bmbx.virt,
4419 if (sli_cmd_common_get_cntl_addl_attributes(sli4, sli4->bmbx.virt,
4456 struct sli4_cmd_read_rev *read_rev = sli4->bmbx.virt;
4458 if (sli_cmd_read_rev(sli4, sli4->bmbx.virt, &sli4->vpd_data))
4523 if (sli_cmd_common_get_port_name(sli4, sli4->bmbx.virt))
4527 (((u8 *)sli4->bmbx.virt) +
4541 if (sli_cmd_read_nvparms(sli4, sli4->bmbx.virt)) {
4551 read_nvparms = sli4->bmbx.virt;
4650 sli4->bmbx.size = SLI4_BMBX_SIZE + sizeof(struct sli4_mcqe);
4651 sli4->bmbx.virt = dma_alloc_coherent(&pdev->dev, sli4->bmbx.size,
4652 &sli4->bmbx.phys, GFP_KERNEL);
4653 if (!sli4->bmbx.virt) {
4654 memset(&sli4->bmbx, 0, sizeof(struct efc_dma));
4659 if (sli4->bmbx.phys & SLI4_BMBX_MASK_LO) {
4664 efc_log_info(sli4, "bmbx v=%p p=0x%x %08x s=%zd\n", sli4->bmbx.virt,
4665 upper_32_bits(sli4->bmbx.phys),
4666 lower_32_bits(sli4->bmbx.phys), sli4->bmbx.size);
4793 dma_free_coherent(&sli4->pci->dev, sli4->bmbx.size,
4794 sli4->bmbx.virt, sli4->bmbx.phys);
4795 memset(&sli4->bmbx, 0, sizeof(struct efc_dma));
4825 sli_cmd_common_modify_eq_delay(sli4, sli4->bmbx.virt, eq, num_eq,
4832 if (sli_res_sli_config(sli4, sli4->bmbx.virt)) {