Lines Matching refs:io_port_base
156 #define DC395x_read8(acb,address) (u8)(inb(acb->io_port_base + (address)))
157 #define DC395x_read16(acb,address) (u16)(inw(acb->io_port_base + (address)))
158 #define DC395x_read32(acb,address) (u32)(inl(acb->io_port_base + (address)))
159 #define DC395x_write8(acb,address,value) outb((value), acb->io_port_base + (address))
160 #define DC395x_write16(acb,address,value) outw((value), acb->io_port_base + (address))
161 #define DC395x_write32(acb,address,value) outl((value), acb->io_port_base + (address))
283 unsigned long io_port_base;
4180 /* NOTE: acb->io_port_base is set at port registration time */
4245 host->io_port = acb->io_port_base;
4248 host->unique_id = acb->io_port_base;
4334 acb->io_port_base = io_port;
4373 if (acb->io_port_base)
4374 release_region(acb->io_port_base, acb->io_port_len);
4428 if (acb->io_port_base)
4429 release_region(acb->io_port_base, acb->io_port_len);
4456 seq_printf(m, "io_port_base 0x%04lx, ", acb->io_port_base);
4594 unsigned long io_port_base;
4606 io_port_base = pci_resource_start(dev, 0) & PCI_BASE_ADDRESS_IO_MASK;
4609 dprintkdbg(DBG_0, "IO_PORT=0x%04lx, IRQ=0x%x\n", io_port_base, dev->irq);
4623 if (adapter_init(acb, io_port_base, io_port_len, irq)) {