Lines Matching refs:TRM_S1040_DMA_CONTROL
1164 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);
1178 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
1670 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, ABORTXFER | CLRXFIFO);
1861 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
1864 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
1908 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, STOPDMAXFER | CLRXFIFO);
2063 /*DC395x_write8 (TRM_S1040_DMA_CONTROL, STOPDMAXFER); */
2271 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, CLRXFIFO);
3460 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);
3461 /*DC395x_write8(acb, TRM_S1040_DMA_CONTROL,STOPDMAXFER); */
4284 DC395x_write8(acb, TRM_S1040_DMA_CONTROL, DMARESETMODULE);