Lines Matching defs:phase
391 data_out_phase0,/* phase:0 */
392 data_in_phase0, /* phase:1 */
393 command_phase0, /* phase:2 */
394 status_phase0, /* phase:3 */
395 nop0, /* phase:4 PH_BUS_FREE .. initial phase */
396 nop0, /* phase:5 PH_BUS_FREE .. initial phase */
397 msgout_phase0, /* phase:6 */
398 msgin_phase0, /* phase:7 */
402 data_out_phase1,/* phase:0 */
403 data_in_phase1, /* phase:1 */
404 command_phase1, /* phase:2 */
405 status_phase1, /* phase:3 */
406 nop1, /* phase:4 PH_BUS_FREE .. initial phase */
407 nop1, /* phase:5 PH_BUS_FREE .. initial phase */
408 msgout_phase1, /* phase:6 */
409 msgin_phase1, /* phase:7 */
884 srb->scsi_phase = PH_BUS_FREE; /* initial phase */
1062 printk(" state=0x%04x status=0x%02x phase=0x%02x (%sconn.)\n",
1112 "clear_fifo: (%i bytes) on phase %02x in %s\n",
1389 srb->scsi_phase = PH_BUS_FREE; /* initial phase */
1501 srb->scsi_phase = PH_BUS_FREE; /* initial phase */
1544 u16 phase;
1597 phase = (u16)srb->scsi_phase;
1601 * call dc395x_scsi_phase0[]... "phase entry"
1602 * handle every phase before start transfer
1604 /* data_out_phase0, phase:0 */
1605 /* data_in_phase0, phase:1 */
1606 /* command_phase0, phase:2 */
1607 /* status_phase0, phase:3 */
1608 /* nop0, phase:4 PH_BUS_FREE .. initial phase */
1609 /* nop0, phase:5 PH_BUS_FREE .. initial phase */
1610 /* msgout_phase0, phase:6 */
1611 /* msgin_phase0, phase:7 */
1612 dc395x_statev = dc395x_scsi_phase0[phase];
1617 * will be modify to bus free phase new scsi_status
1621 phase = (u16)scsi_status & PHASEMASK;
1624 * call dc395x_scsi_phase1[]... "phase entry" handle
1625 * every phase to do transfer
1627 /* data_out_phase1, phase:0 */
1628 /* data_in_phase1, phase:1 */
1629 /* command_phase1, phase:2 */
1630 /* status_phase1, phase:3 */
1631 /* nop1, phase:4 PH_BUS_FREE .. initial phase */
1632 /* nop1, phase:5 PH_BUS_FREE .. initial phase */
1633 /* msgout_phase1, phase:6 */
1634 /* msgin_phase1, phase:7 */
1635 dc395x_statev = dc395x_scsi_phase1[phase];
1687 *pscsi_status = PH_BUS_FREE; /*.. initial phase */
1851 * Best might be to call it in DataXXPhase0, if new phase will differ
1892 * However, the device might have been the one to stop us (phase
1969 * But: Why the interrupt: No phase change. No XFERCNT_2_ZERO. Or?
2018 /* do prepare before transfer when data out phase */
2032 * and switches to another phase, the SCSI engine should be finished too.
2056 * sent data to the FIFO in a MsgIn phase, eg.?
2216 } else { /* phase changed */
2427 *pscsi_status = PH_BUS_FREE; /*.. initial phase */
2886 srb->scsi_phase = PH_BUS_FREE; /* initial phase */
3045 srb->scsi_phase = PH_BUS_FREE; /* initial phase */