Lines Matching refs:acfg
331 struct ocxl_afu_config *acfg = &afu->acfg;
349 ctx->psn_size = acfg->global_mmio_size;
352 ctx->psn_size = acfg->pp_mmio_stride;
403 struct ocxl_afu_config *acfg = &afu->acfg;
416 rc = ocxl_config_terminate_pasid(pdev, acfg->dvsec_afu_control_pos,
714 pos = afu->acfg.dvsec_afu_control_pos;
803 struct ocxl_afu_config *acfg = &afu->acfg;
809 rc = pci_request_region(pdev, acfg->global_mmio_bar, "ocxlflash");
815 gmmio = pci_resource_start(pdev, acfg->global_mmio_bar);
816 gmmio += acfg->global_mmio_offset;
818 rc = pci_request_region(pdev, acfg->pp_mmio_bar, "ocxlflash");
824 ppmmio = pci_resource_start(pdev, acfg->pp_mmio_bar);
825 ppmmio += acfg->pp_mmio_offset;
827 afu->gmmio_virt = ioremap(gmmio, acfg->global_mmio_size);
839 pci_release_region(pdev, acfg->pp_mmio_bar);
841 pci_release_region(pdev, acfg->global_mmio_bar);
856 struct ocxl_afu_config *acfg = &afu->acfg;
869 rc = ocxl_config_read_afu(pdev, fcfg, acfg, 0);
878 count = min_t(int, acfg->actag_supported, afu->fn_actag_enabled);
879 pos = acfg->dvsec_afu_control_pos;
885 afu->max_pasid = 1 << acfg->pasid_supported_log;
887 ocxl_config_set_afu_pasid(pdev, pos, 0, acfg->pasid_supported_log);
897 ocxl_config_set_afu_state(pdev, acfg->dvsec_afu_control_pos, 1);