Lines Matching defs:ulp_num
580 uint8_t ulp_num = 0;
585 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
592 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
593 icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
594 icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
607 iscsi_icd_start[ulp_num] =
621 phba->fw_config.iscsi_icd_count[ulp_num] = (icd_count -
630 iscsi_icd_start[ulp_num],
632 iscsi_icd_count[ulp_num],
638 total_icd_count = phba->fw_config.iscsi_icd_count[ulp_num];
1725 u8 header, u8 ulp_num, u16 nbuf)
1736 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1740 ring_id = phwi_ctrlr->default_pdu_hdr[ulp_num].id;
1741 doorbell_offset = phwi_ctrlr->default_pdu_hdr[ulp_num].
1746 ring_id = phwi_ctrlr->default_pdu_data[ulp_num].id;
1747 doorbell_offset = phwi_ctrlr->default_pdu_data[ulp_num].
1788 u8 ulp_num, consumed, header = 0;
1793 ulp_num = BEISCSI_GET_ULP_FROM_CRI(phwi_ctrlr, cid_cri);
1794 pasync_ctx = HWI_GET_ASYNC_PDU_CTX(phwi_ctrlr, ulp_num);
1807 beiscsi_hdq_post_handles(phba, header, ulp_num, 8 * consumed);
2365 uint8_t mem_descr_index, ulp_num;
2390 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2391 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2395 phba, ulp_num) *
2400 phba, ulp_num) *
2405 phba, ulp_num) *
2410 phba, ulp_num) *
2414 (ulp_num * MEM_DESCR_OFFSET));
2416 BEISCSI_GET_CID_COUNT(phba, ulp_num) *
2420 (ulp_num * MEM_DESCR_OFFSET));
2426 (ulp_num * MEM_DESCR_OFFSET));
2432 (ulp_num * MEM_DESCR_OFFSET));
2438 (ulp_num * MEM_DESCR_OFFSET));
2444 (ulp_num * MEM_DESCR_OFFSET));
2446 BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2450 (ulp_num * MEM_DESCR_OFFSET));
2452 BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2456 (ulp_num * MEM_DESCR_OFFSET));
2459 (BEISCSI_ASYNC_HDQ_SIZE(phba, ulp_num) *
2719 uint8_t ulp_num;
2727 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
2728 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
2732 (ulp_num * MEM_DESCR_OFFSET));
2735 phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num] =
2739 pasync_ctx = phwi_ctrlr->phwi_ctxt->pasync_ctx[ulp_num];
2748 ulp_num);
2752 (ulp_num * MEM_DESCR_OFFSET);
2757 ulp_num,
2764 ulp_num);
2778 (ulp_num * MEM_DESCR_OFFSET);
2783 ulp_num,
2790 ulp_num);
2798 (ulp_num * MEM_DESCR_OFFSET);
2803 ulp_num,
2810 ulp_num);
2818 (ulp_num * MEM_DESCR_OFFSET);
2823 ulp_num,
2830 ulp_num);
2838 (ulp_num * MEM_DESCR_OFFSET);
2843 ulp_num);
2858 (ulp_num * MEM_DESCR_OFFSET);
2863 ulp_num,
2870 ulp_num);
2886 (phba, ulp_num); index++) {
3143 unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3153 dq = &phwi_context->be_def_hdrq[ulp_num];
3158 (ulp_num * MEM_DESCR_OFFSET);
3166 ulp_num);
3175 BEISCSI_DEFQ_HDR, ulp_num);
3179 ulp_num);
3186 ulp_num,
3187 phwi_context->be_def_hdrq[ulp_num].id);
3195 unsigned int def_pdu_ring_sz, uint8_t ulp_num)
3205 dataq = &phwi_context->be_def_dataq[ulp_num];
3210 (ulp_num * MEM_DESCR_OFFSET);
3219 ulp_num);
3228 BEISCSI_DEFQ_DATA, ulp_num);
3233 ulp_num);
3239 ulp_num,
3240 phwi_context->be_def_dataq[ulp_num].id);
3244 ulp_num);
3255 int status, ulp_num;
3257 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3258 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3261 (ulp_num * MEM_DESCR_OFFSET);
3271 "ULP_%d\n", ulp_num);
3277 "ULP_%d\n", ulp_num);
3290 int status, ulp_num = 0;
3296 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3297 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3301 phba->fw_config.iscsi_icd_start[ulp_num]) / PAGE_SIZE;
3353 unsigned int idx, num, i, ulp_num;
3407 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3408 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3410 ulp_base_num = ulp_num;
3411 cid_count_ulp[ulp_num] =
3412 BEISCSI_GET_CID_COUNT(phba, ulp_num);
3637 int i, eq_for_mcc, ulp_num;
3639 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3640 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3641 beiscsi_cmd_iscsi_cleanup(phba, ulp_num);
3663 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3664 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3666 q = &phwi_context->be_def_hdrq[ulp_num];
3670 q = &phwi_context->be_def_dataq[ulp_num];
3710 int status, ulp_num;
3743 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3744 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3745 nbufs = phwi_context->pasync_ctx[ulp_num]->num_entries;
3751 ulp_num);
3755 ulp_num);
3762 ulp_num);
3766 ulp_num);
3774 ulp_num, nbufs);
3776 ulp_num, nbufs);
3800 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
3803 if (test_bit(ulp_num, &phba->fw_config.ulp_supported)) {
3808 phwi_ctrlr, ulp_num);
3811 if (ulp_num == BEISCSI_GET_ULP_FROM_CRI
3897 unsigned int ulp_icd_start, ulp_num = 0;
3964 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++)
3965 if (test_bit(ulp_num, &phba->fw_config.ulp_supported))
3968 ulp_icd_start = phba->fw_config.iscsi_icd_start[ulp_num];
4002 uint16_t i, ulp_num;
4005 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4006 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4017 kcalloc(BEISCSI_GET_CID_COUNT(phba, ulp_num),
4028 phba, ulp_num);
4031 phba->cid_array_info[ulp_num] = ptr_cid_info;
4055 ulp_num = phba->phwi_ctrlr->wrb_context[i].ulp_num;
4057 ptr_cid_info = phba->cid_array_info[ulp_num];
4063 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4064 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4065 ptr_cid_info = phba->cid_array_info[ulp_num];
4074 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4075 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4076 ptr_cid_info = phba->cid_array_info[ulp_num];
4081 phba->cid_array_info[ulp_num] = NULL;
4181 int ulp_num;
4188 for (ulp_num = 0; ulp_num < BEISCSI_ULP_COUNT; ulp_num++) {
4189 if (test_bit(ulp_num, (void *)&phba->fw_config.ulp_supported)) {
4190 ptr_cid_info = phba->cid_array_info[ulp_num];
4195 phba->cid_array_info[ulp_num] = NULL;