Lines Matching refs:uchar
63 typedef unsigned char uchar;
114 #define ASC_SCSI_TIX_TYPE uchar
116 #define ASC_SCSI_BIT_ID_TYPE uchar
247 uchar status;
248 uchar q_no;
249 uchar cntl;
250 uchar sg_queue_cnt;
251 uchar target_id;
252 uchar target_lun;
256 uchar sense_len;
257 uchar extra_bytes;
262 uchar target_ix;
263 uchar flag;
264 uchar cdb_len;
265 uchar tag_code;
270 uchar done_stat;
271 uchar host_stat;
272 uchar scsi_stat;
273 uchar scsi_msg;
277 uchar cdb[ASC_MAX_CDB_LEN];
278 uchar y_first_sg_list_qp;
279 uchar y_working_sg_qp;
280 uchar y_working_sg_ix;
281 uchar y_res;
291 uchar q_status;
292 uchar q_no;
293 uchar cntl;
294 uchar sense_len;
295 uchar extra_bytes;
296 uchar res;
316 uchar *cdbptr;
325 uchar *cdbptr;
327 uchar *sense_ptr;
329 uchar cdb[ASC_MAX_CDB_LEN];
330 uchar sense[ASC_MIN_SENSE_LEN];
334 uchar fwd;
335 uchar bwd;
343 uchar seq_no;
344 uchar q_no;
345 uchar cntl;
346 uchar sg_head_qp;
347 uchar sg_list_cnt;
348 uchar sg_cur_list_cnt;
352 uchar fwd;
353 uchar bwd;
423 uchar msg_type;
424 uchar msg_len;
425 uchar msg_req;
428 uchar sdtr_xfer_period;
429 uchar sdtr_req_ack_offset;
432 uchar wdtr_width;
435 uchar mdp_b3;
436 uchar mdp_b2;
437 uchar mdp_b1;
438 uchar mdp_b0;
441 uchar res;
457 uchar chip_scsi_id;
458 uchar chip_version;
461 uchar max_tag_qng[ASC_MAX_TID + 1];
462 uchar sdtr_period_offset[ASC_MAX_TID + 1];
463 uchar adapter_info[6];
499 uchar *overrun_buf;
501 uchar scsi_reset_wait;
502 uchar chip_no;
504 uchar max_total_qng;
505 uchar cur_total_qng;
506 uchar in_critical_cnt;
507 uchar last_q_shortage;
509 uchar cur_dvc_qng[ASC_MAX_TID + 1];
510 uchar max_dvc_qng[ASC_MAX_TID + 1];
513 const uchar *sdtr_period_tbl;
518 uchar dos_int13_table[ASC_MAX_TID + 1];
522 uchar min_sdtr_index;
523 uchar max_sdtr_index;
529 uchar type[ASC_MAX_TID + 1][ASC_MAX_LUN + 1];
578 uchar init_sdtr;
579 uchar disc_enable;
580 uchar use_cmd_qng;
581 uchar start_motor;
582 uchar max_total_qng;
583 uchar max_tag_qng;
584 uchar bios_scan;
585 uchar power_up_wait;
586 uchar no_scam;
587 uchar id_speed; /* low order 4 bits is chip scsi id */
589 uchar dos_int13_table[ASC_MAX_TID + 1];
590 uchar adapter_info[6];
693 #define SC_SEL (uchar)(0x80)
694 #define SC_BSY (uchar)(0x40)
695 #define SC_ACK (uchar)(0x20)
696 #define SC_REQ (uchar)(0x10)
697 #define SC_ATN (uchar)(0x08)
698 #define SC_IO (uchar)(0x04)
699 #define SC_CD (uchar)(0x02)
700 #define SC_MSG (uchar)(0x01)
701 #define SEC_SCSI_CTL (uchar)(0x80)
702 #define SEC_ACTIVE_NEGATE (uchar)(0x40)
703 #define SEC_SLEW_RATE (uchar)(0x20)
704 #define SEC_ENABLE_FILTER (uchar)(0x10)
764 #define CC_CHIP_RESET (uchar)0x80
765 #define CC_SCSI_RESET (uchar)0x40
766 #define CC_HALT (uchar)0x20
767 #define CC_SINGLE_STEP (uchar)0x10
768 #define CC_DMA_ABLE (uchar)0x08
769 #define CC_TEST (uchar)0x04
770 #define CC_BANK_ONE (uchar)0x02
771 #define CC_DIAG (uchar)0x01
804 #define AscGetChipSignatureByte(port) (uchar)inp((port)+IOP_SIG_BYTE)
806 #define AscGetChipVerNo(port) (uchar)inp((port)+IOP_VERSION)
811 #define AscGetChipEEPCmd(port) (uchar)inp((port)+IOP_EEP_CMD)
819 #define AscGetChipIFC(port) (uchar)inp((port)+IOP_REG_IFC)
823 #define AscGetChipControl(port) (uchar)inp((port)+IOP_CTRL)
825 #define AscGetChipSyn(port) (uchar)inp((port)+IOP_SYN_OFFSET)
831 #define AscGetExtraControl(port) (uchar)inp((port)+IOP_EXTRA_CONTROL)
835 #define AscReadChipIX(port) (uchar)inp((port)+IOP_REG_IX)
839 #define AscReadChipQP(port) (uchar)inp((port)+IOP_REG_QP)
845 #define AscReadChipDmaSpeed(port) (uchar)inp((port)+IOP_DMA_SPEED)
855 #define AscReadChipDvcID(port) (uchar)inp((port)+IOP_REG_ID)
931 uchar adapter_scsi_id; /* 09 Host Adapter ID */
932 uchar bios_boot_delay; /* power up wait */
934 uchar scsi_reset_delay; /* 10 reset delay */
935 uchar bios_id_lun; /* first boot device scsi id & lun */
939 uchar termination; /* 11 0 - automatic */
945 uchar reserved1; /* reserved byte (not used) */
966 uchar max_host_qng; /* 15 maximum host queuing */
967 uchar max_dvc_qng; /* maximum per device queuing */
974 uchar oem_name[16]; /* 22 OEM name */
1000 uchar adapter_scsi_id; /* 09 Host Adapter ID */
1001 uchar bios_boot_delay; /* power up wait */
1003 uchar scsi_reset_delay; /* 10 reset delay */
1004 uchar bios_id_lun; /* first boot device scsi id & lun */
1008 uchar termination_se; /* 11 0 - automatic */
1014 uchar termination_lvd; /* 11 0 - automatic */
1039 uchar max_host_qng; /* 15 maximum host queueing */
1040 uchar max_dvc_qng; /* maximum per device queuing */
1047 uchar oem_name[16]; /* 22 OEM name */
1102 uchar adapter_scsi_id; /* 09 Host Adapter ID */
1103 uchar bios_boot_delay; /* power up wait */
1105 uchar scsi_reset_delay; /* 10 reset delay */
1106 uchar bios_id_lun; /* first boot device scsi id & lun */
1110 uchar termination_se; /* 11 0 - automatic */
1116 uchar termination_lvd; /* 11 0 - automatic */
1141 uchar max_host_qng; /* 15 maximum host queueing */
1142 uchar max_dvc_qng; /* maximum per device queuing */
1149 uchar oem_name[16]; /* 22 OEM name */
1698 uchar chip_version; /* chip version */
1699 uchar termination; /* Term. Ctrl. bits 6-5 of SCSI_CFG1 register */
1712 uchar reserved1;
1713 uchar reserved2;
1714 uchar reserved3;
1715 uchar sg_cnt; /* Valid entries in block. */
1735 uchar cntl; /* Ucode flags and state (ASC_MC_QC_*). */
1736 uchar target_cmd;
1737 uchar target_id; /* Device target identifier. */
1738 uchar target_lun; /* Device target logical unit number. */
1743 uchar mflag;
1744 uchar sense_len;
1745 uchar cdb_len; /* SCSI CDB length. Must <= 16 bytes. */
1746 uchar scsi_cntl;
1747 uchar done_status; /* Completion status. */
1748 uchar scsi_status; /* SCSI status byte. */
1749 uchar host_status; /* Ucode host status. */
1750 uchar sg_working_ix;
1751 uchar cdb[12]; /* SCSI CDB bytes 0-11. */
1754 uchar cdb16[4]; /* SCSI CDB bytes 12-15. */
1788 uchar align[24]; /* Request structure padding. */
1819 uchar max_dvc_qng; /* maximum number of tagged commands per device */
1821 uchar scsi_reset_wait; /* delay in seconds after scsi bus reset */
1822 uchar chip_no; /* should be assigned by caller */
1823 uchar max_host_qng; /* maximum number of Q'ed command allowed */
1826 uchar chip_scsi_id; /* chip SCSI target ID */
1827 uchar chip_type;
1828 uchar bist_err_code;
2185 ASC_DBG_PRT_HEX((lvl), "CDB", (uchar *) (cdb), (len));
2188 ASC_DBG_PRT_HEX((lvl), "SENSE", (uchar *) (sense), (len));
2191 ASC_DBG_PRT_HEX((lvl), "INQUIRY", (uchar *) (inq), (len));
2258 uchar sdtr_data[ASC_MAX_TID + 1]; /* SDTR information */
2431 static void asc_prt_hex(char *f, uchar *s, int l)
2771 static int asc_get_eeprom_string(ushort *serialnum, uchar *cp)
2856 uchar serialstr[13];
2918 uchar serialstr[13];
3248 uchar syn_period_ix;
3303 uchar lrambyte;
3607 static void AscSetBank(PortAddr iop_base, uchar bank)
3609 uchar val;
3643 uchar cc_val;
3648 AscSetChipControl(iop_base, (uchar)(cc_val | CC_HALT));
3696 if (AscGetChipSignatureByte(iop_base) == (uchar)ASC_1000_ID1B) {
3724 static uchar AscReadLramByte(PortAddr iop_base, ushort addr)
3767 static void AscWriteLramByte(PortAddr iop_base, ushort addr, uchar byte_val)
3792 const uchar *s_buffer, int words)
3819 ushort s_addr, uchar *s_buffer, int dwords)
3838 ushort s_addr, uchar *d_buffer, int words)
3864 uchar i;
3875 (uchar)(i + 1));
3877 (uchar)(asc_dvc->max_total_qng));
3879 (uchar)i);
3884 (uchar)(i + 1));
3886 (uchar)(i - 1));
3888 (uchar)i);
3891 (uchar)ASC_QLINK_END);
3893 (uchar)(asc_dvc->max_total_qng - 1));
3895 (uchar)asc_dvc->max_total_qng);
3898 for (; i <= (uchar)(asc_dvc->max_total_qng + 3);
3911 const uchar *mcode_buf, ushort mcode_size)
3948 (uchar)((int)asc_dvc->max_total_qng + 1));
3950 (uchar)((int)asc_dvc->max_total_qng + 2));
3997 (uchar *)&phy_addr, 1);
4000 (uchar *)&phy_size, 1);
4364 uchar tid;
4367 uchar max_cmd[ADV_MAX_TID + 1];
4807 uchar byte;
4808 uchar tid;
4811 uchar max_cmd[ADV_MAX_TID + 1];
5293 uchar byte;
5294 uchar tid;
5297 uchar max_cmd[ASC_MAX_TID + 1];
5775 uchar tid, max_cmd[ADV_MAX_TID + 1];
5858 static void adv_async_callback(ADV_DVC_VAR *adv_dvc_varp, uchar code)
6049 uchar int_stat;
6071 uchar intrb_code;
6169 uchar host_flag;
6170 uchar risc_flag;
6184 (uchar)(host_flag | ASC_HOST_FLAG_ACK_INT));
6196 static uchar AscGetSynPeriodIndex(ASC_DVC_VAR *asc_dvc, uchar syn_time)
6198 const uchar *period_table;
6209 return (uchar)i;
6212 return (uchar)max_index;
6214 return (uchar)(max_index + 1);
6218 static uchar
6219 AscMsgOutSDTR(ASC_DVC_VAR *asc_dvc, uchar sdtr_period, uchar sdtr_offset)
6222 uchar sdtr_period_index = AscGetSynPeriodIndex(asc_dvc, sdtr_period);
6234 (uchar *)&sdtr_buf,
6240 (uchar *)&sdtr_buf,
6246 static uchar
6247 AscCalSDTRData(ASC_DVC_VAR *asc_dvc, uchar sdtr_period, uchar syn_offset)
6249 uchar byte;
6250 uchar sdtr_period_ix;
6259 static bool AscSetChipSynRegAtID(PortAddr iop_base, uchar id, uchar sdtr_data)
6288 static void AscSetChipSDTR(PortAddr iop_base, uchar sdtr_data, uchar tid_no)
6304 uchar tag_code;
6305 uchar q_status;
6306 uchar halt_qp;
6307 uchar sdtr_data;
6308 uchar target_ix;
6309 uchar q_cntl, tid_no;
6310 uchar cur_dvc_qng;
6311 uchar asyn_sdtr;
6312 uchar scsi_status;
6329 target_id = (uchar)ASC_TID_TO_TARGET_ID(tid_no);
6352 (uchar *)&ext_msg,
6442 (uchar *)&ext_msg,
6456 (uchar *)&ext_msg,
6479 (uchar)(asc_dvc->
6482 (uchar)(sdtr_data & (uchar)
6526 (uchar *)&out_msg,
6595 * DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words)
6604 DvcGetQinfo(PortAddr iop_base, ushort s_addr, uchar *inbuf, int words)
6621 static uchar
6627 uchar sg_queue_cnt;
6631 (uchar *)scsiq,
6636 scsiq->q_status = (uchar)_val;
6637 scsiq->q_no = (uchar)(_val >> 8);
6640 scsiq->cntl = (uchar)_val;
6641 sg_queue_cnt = (uchar)(_val >> 8);
6645 scsiq->sense_len = (uchar)_val;
6646 scsiq->extra_bytes = (uchar)(_val >> 8);
6766 uchar next_qp;
6767 uchar n_q_used;
6768 uchar sg_list_qp;
6769 uchar sg_queue_cnt;
6770 uchar q_cnt;
6771 uchar done_q_tail;
6772 uchar tid_no;
6778 uchar cur_target_qng;
6786 done_q_tail = (uchar)AscGetVarDoneQTail(iop_base);
6798 (uchar)(scsiq->
6799 q_status & (uchar)~(QS_READY |
6887 (uchar)(CC_SCSI_RESET
6929 uchar ctrl_reg;
6930 uchar saved_ctrl_reg;
6933 uchar host_flag;
6962 saved_ctrl_reg &= (uchar)(~CC_HALT);
6977 (uchar)(~ASC_HOST_FLAG_IN_ISR);
6979 (uchar)(host_flag | (uchar)ASC_HOST_FLAG_IN_ISR));
6985 saved_ctrl_reg &= (uchar)(~CC_HALT);
7168 uchar saved_stop_code;
7187 AscSetRunChipSynRegAtID(PortAddr iop_base, uchar tid_no, uchar sdtr_data)
7779 AscGetNumOfFreeQueue(ASC_DVC_VAR *asc_dvc, uchar target_ix, uchar n_qs)
7784 uchar tid_no;
7816 static uchar AscAllocFreeQueue(PortAddr iop_base, uchar free_q_head)
7819 uchar next_qp;
7820 uchar q_status;
7823 q_status = (uchar)AscReadLramByte(iop_base,
7832 static uchar
7833 AscAllocMultipleFreeQueue(PortAddr iop_base, uchar free_q_head, uchar n_free_q)
7835 uchar i;
7847 * DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words)
7856 DvcPutScsiQ(PortAddr iop_base, ushort s_addr, uchar *outbuf, int words)
7871 static int AscPutReadyQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no)
7874 uchar tid_no;
7875 uchar sdtr_data;
7876 uchar syn_period_ix;
7877 uchar syn_offset;
7900 (uchar *)scsiq->cdbptr, scsiq->q2.cdb_len >> 1);
7904 (uchar *)&scsiq->q1.cntl,
7914 AscPutReadySgListQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar q_no)
7927 uchar next_qp;
7952 sg_list_dwords = (uchar)(ASC_SG_LIST_PER_Q * 2);
7987 (uchar *)&scsi_sg_q,
7991 (uchar *)&sg_head->
8007 AscSendScsiQueue(ASC_DVC_VAR *asc_dvc, ASC_SCSI_Q *scsiq, uchar n_q_required)
8010 uchar free_q_head;
8011 uchar next_qp;
8012 uchar tid_no;
8013 uchar target_ix;
8020 free_q_head = (uchar)AscGetVarFreeQHead(iop_base);
8023 (uchar)n_q_required);
8047 static uchar _syn_offset_one_disable_cmd[ASC_SYN_OFFSET_ONE_DISABLE_LIST] = {
8076 uchar target_ix;
8077 uchar tid_no;
8078 uchar sdtr_data;
8079 uchar extra_bytes;
8080 uchar scsi_cmd;
8081 uchar disable_cmd;
8104 (uchar)(asc_dvc->
8107 (uchar)(sdtr_data & (uchar)
8187 (uchar)((ushort)addr & 0x0003);
8234 (uchar)((ushort)addr & 0x0003);
8528 static uchar AscSetChipScsiID(PortAddr iop_base, uchar new_host_id)
8595 uchar chip_version;
8664 static int AscWriteEEPCmdReg(PortAddr iop_base, uchar cmd_reg)
8684 static ushort AscReadEEPWord(PortAddr iop_base, uchar addr)
8687 uchar cmd_reg;
8714 *wbuf = AscReadEEPWord(iop_base, (uchar)s_addr);
8725 wval = AscReadEEPWord(iop_base, (uchar)s_addr);
8742 *wbuf = AscReadEEPWord(iop_base, (uchar)s_addr);
8792 static ushort AscWriteEEPWord(PortAddr iop_base, uchar addr, ushort word_val)
8803 (uchar)((uchar)ASC_EEP_CMD_WRITE | addr));
8830 if (*wbuf != AscWriteEEPWord(iop_base, (uchar)s_addr, *wbuf)) {
8849 AscWriteEEPWord(iop_base, (uchar)s_addr, word)) {
8855 AscWriteEEPWord(iop_base, (uchar)s_addr, *wbuf)) {
8863 if (sum != AscWriteEEPWord(iop_base, (uchar)s_addr, sum)) {
8873 if (*wbuf != AscReadEEPWord(iop_base, (uchar)s_addr)) {
8892 (iop_base, (uchar)s_addr));
8895 word = AscReadEEPWord(iop_base, (uchar)s_addr);
8902 if (AscReadEEPWord(iop_base, (uchar)s_addr) != sum) {
9073 (uchar)(ASC_DEF_SDTR_OFFSET |
10111 uchar tid, termination;
10310 uchar tid, termination;